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Commit 236df8d5 authored by Kuogee Hsieh's avatar Kuogee Hsieh
Browse files

msm: mdss: do not clear dsi-0 irq from dsi-1 with broadcast mode 



At current broadcast mode implementation, dsi-1 try to clear dsi-0
irq at its interrupt service routine. This is not necessary.
When broadcast enabled, dsi-0 fetch command and wait for dsi-1 to
trigger cmd engine so that both dsi-0 and dsi-1 dcs commands are sent to
destination synchronously. Both controller receive CMD_DONE isr to
indicate dcs commands had been sent to destination. Therefore both
dsi-0 and dsi-1 should will clear its irq.

CRs-Fixed: 651042
Change-Id: Idd2ff593f8ab8b514bf760090b98aaaf4dd4429a
Signed-off-by: default avatarKuogee Hsieh <khsieh@codeaurora.org>
parent 6791a1be

drivers/video/msm/mdss/mdss_dsi_host.c

+7 −19
Original line number Diff line number Diff line
@@ -1485,7 +1485,6 @@ irqreturn_t mdss_dsi_isr(int irq, void *ptr) 
	u32 isr;

	struct mdss_dsi_ctrl_pdata *ctrl =

			(struct mdss_dsi_ctrl_pdata *)ptr;

	struct mdss_dsi_ctrl_pdata *mctrl = NULL;



	if (!ctrl->ctrl_base) {

		pr_err("%s:%d DSI base adr no Initialized",
@@ -1496,20 +1495,6 @@ irqreturn_t mdss_dsi_isr(int irq, void *ptr) 
	isr = MIPI_INP(ctrl->ctrl_base + 0x0110);/* DSI_INTR_CTRL */

	MIPI_OUTP(ctrl->ctrl_base + 0x0110, isr);



	if (mdss_dsi_is_slave_ctrl(ctrl)) {

		mctrl = mdss_dsi_get_master_ctrl();

		if (mctrl) {

			u32 isr0;

			isr0 = MIPI_INP(mctrl->ctrl_base + 0x0110);

			if (isr0 & DSI_INTR_CMD_DMA_DONE)

				MIPI_OUTP(mctrl->ctrl_base + 0x0110,

					DSI_INTR_CMD_DMA_DONE);

		} else {

			pr_warn("%s: Unable to get master control\n",

				__func__);

		}

	}



	pr_debug("%s: ndx=%d isr=%x\n", __func__, ctrl->ndx, isr);



	if (isr & DSI_INTR_ERROR) {
@@ -1527,11 +1512,14 @@ irqreturn_t mdss_dsi_isr(int irq, void *ptr) 


	if (isr & DSI_INTR_CMD_DMA_DONE) {

		MDSS_XLOG(ctrl->ndx, ctrl->mdp_busy, isr, 0x98);

		/* at broadcast mode, only slave's irq enabled */

		if (!mdss_dsi_is_master_ctrl(ctrl)) {

			spin_lock(&ctrl->mdp_lock);

			mdss_dsi_disable_irq_nosync(ctrl, DSI_CMD_TERM);

			complete(&ctrl->dma_comp);

			spin_unlock(&ctrl->mdp_lock);

		}

	}



	if (isr & DSI_INTR_CMD_MDP_DONE) {

		MDSS_XLOG(ctrl->ndx, ctrl->mdp_busy, isr, 0x99);