Loading arch/arm/boot/dts/qcom/msmplutonium-bus.dtsi +8 −8 Original line number Diff line number Diff line Loading @@ -185,7 +185,7 @@ /* mnoc Devices */ mas_cnoc_mnoc_mmss_cfg: mas-cnoc-mnoc-mmss-cfg { cell-id = <MSM_BUS_SLAVE_CNOC_MNOC_MMSS_CFG>; cell-id = <MSM_BUS_MASTER_CNOC_MNOC_MMSS_CFG>; label = "mas-cnoc-mnoc-mmss-cfg"; qcom,bus-dev = <&fab_mnoc>; qcom,buswidth = <16>; Loading @@ -199,7 +199,7 @@ mas_cnoc_mnoc_cfg: mas-cnoc-mnoc-cfg { cell-id = <MSM_BUS_SLAVE_CNOC_MNOC_CFG>; cell-id = <MSM_BUS_MASTER_CNOC_MNOC_CFG>; label = "mas-cnoc-mnoc-cfg"; qcom,bus-dev = <&fab_mnoc>; qcom,buswidth = <16>; Loading Loading @@ -320,7 +320,7 @@ slv_ocmem_cfg: slv-ocmem-cfg { cell-id = <MSM_BUS_SLAVE_CPR_XPU_CFG>; cell-id = <MSM_BUS_SLAVE_OCMEM_CFG>; label = "slv-ocmem-cfg"; qcom,bus-dev = <&fab_mnoc>; qcom,buswidth = <16>; Loading Loading @@ -429,7 +429,7 @@ slv_srvc_mnoc: slv-srvc-mnoc { cell-id = <MSM_BUS_SLAVE_CNOC_MNOC_CFG>; cell-id = <MSM_BUS_SLAVE_SRVC_MNOC>; label = "slv-srvc-mnoc"; qcom,bus-dev = <&fab_mnoc>; qcom,buswidth = <16>; Loading Loading @@ -562,7 +562,7 @@ mas_pcie_0: mas-pcie-0 { cell-id = <MSM_BUS_MASTER_PCIE_0>; cell-id = <MSM_BUS_MASTER_PCIE>; label = "mas-pcie-0"; qcom,bus-dev = <&fab_snoc>; qcom,buswidth = <8>; Loading Loading @@ -611,7 +611,7 @@ mas_usb3: mas-usb3 { cell-id = <MSM_BUS_SLAVE_USB3>; cell-id = <MSM_BUS_MASTER_USB3>; label = "mas-usb3"; qcom,bus-dev = <&fab_snoc>; qcom,buswidth = <8>; Loading Loading @@ -860,7 +860,7 @@ mas_pnoc_cfg: mas-pnoc-cfg { cell-id = <MSM_BUS_SLAVE_PNOC_CFG>; cell-id = <MSM_BUS_MASTER_PNOC_CFG>; label = "mas-pnoc-cfg"; qcom,bus-dev = <&fab_pnoc>; qcom,buswidth = <8>; Loading Loading @@ -923,7 +923,7 @@ qcom,bus-dev = <&fab_pnoc>; qcom,buswidth = <8>; qcom,connections = <&slv_bam_dma &slv_sdcc_1 &slv_sdcc_3 &slv_blsp_2 &slv_sdcc_2 &slv_sdcc_4 &slv_tsif &slv_sdcc_2 &slv_sdcc_4 &slv_blsp_2 &slv_blsp_1 &slv_tsif &slv_usb_hs &slv_pdm &slv_prng>; qcom,mas-rpm-id = <ICBID_MASTER_SNOC_PNOC>; Loading include/dt-bindings/msm/msm-bus-ids.h +8 −6 Original line number Diff line number Diff line Loading @@ -129,10 +129,11 @@ #define MSM_BUS_MASTER_CRYPTO_CORE2 97 #define MSM_BUS_MASTER_EMAC 98 #define MSM_BUS_MASTER_VPU_1 99 #define MSM_BUS_MASTER_PCIE_0 100 #define MSM_BUS_MASTER_PCIE_1 101 #define MSM_BUS_MASTER_USB3_1 102 #define MSM_BUS_MASTER_LAST 103 #define MSM_BUS_MASTER_PCIE_1 100 #define MSM_BUS_MASTER_USB3_1 101 #define MSM_BUS_MASTER_CNOC_MNOC_MMSS_CFG 102 #define MSM_BUS_MASTER_CNOC_MNOC_CFG 103 #define MSM_BUS_MASTER_LAST 104 #define MSM_BUS_SYSTEM_FPB_MASTER_SYSTEM MSM_BUS_SYSTEM_MASTER_SYSTEM_FPB #define MSM_BUS_CPSS_FPB_MASTER_SYSTEM MSM_BUS_SYSTEM_MASTER_CPSS_FPB Loading Loading @@ -182,7 +183,7 @@ #define MSM_BUS_SNOC_PNOC_SLV 10042 #define MSM_BUS_BIMC_INT_APPS_EBI 10043 #define MSM_BUS_BIMC_INT_APPS_SNOC 10044 #define MSM_BUS_INT_LAST 10043 #define MSM_BUS_INT_LAST 10045 #define MSM_BUS_SLAVE_FIRST 512 #define MSM_BUS_SLAVE_EBI_CH0 512 Loading Loading @@ -342,7 +343,8 @@ #define MSM_BUS_SLAVE_PCIE_1 666 #define MSM_BUS_SLAVE_PCIE_0_CFG 667 #define MSM_BUS_SLAVE_PCIE_1_CFG 668 #define MSM_BUS_SLAVE_LAST 669 #define MSM_BUS_SLAVE_SRVC_MNOC 669 #define MSM_BUS_SLAVE_LAST 670 #define MSM_BUS_SYSTEM_FPB_SLAVE_SYSTEM MSM_BUS_SYSTEM_SLAVE_SYSTEM_FPB #define MSM_BUS_CPSS_FPB_SLAVE_SYSTEM MSM_BUS_SYSTEM_SLAVE_CPSS_FPB Loading Loading
arch/arm/boot/dts/qcom/msmplutonium-bus.dtsi +8 −8 Original line number Diff line number Diff line Loading @@ -185,7 +185,7 @@ /* mnoc Devices */ mas_cnoc_mnoc_mmss_cfg: mas-cnoc-mnoc-mmss-cfg { cell-id = <MSM_BUS_SLAVE_CNOC_MNOC_MMSS_CFG>; cell-id = <MSM_BUS_MASTER_CNOC_MNOC_MMSS_CFG>; label = "mas-cnoc-mnoc-mmss-cfg"; qcom,bus-dev = <&fab_mnoc>; qcom,buswidth = <16>; Loading @@ -199,7 +199,7 @@ mas_cnoc_mnoc_cfg: mas-cnoc-mnoc-cfg { cell-id = <MSM_BUS_SLAVE_CNOC_MNOC_CFG>; cell-id = <MSM_BUS_MASTER_CNOC_MNOC_CFG>; label = "mas-cnoc-mnoc-cfg"; qcom,bus-dev = <&fab_mnoc>; qcom,buswidth = <16>; Loading Loading @@ -320,7 +320,7 @@ slv_ocmem_cfg: slv-ocmem-cfg { cell-id = <MSM_BUS_SLAVE_CPR_XPU_CFG>; cell-id = <MSM_BUS_SLAVE_OCMEM_CFG>; label = "slv-ocmem-cfg"; qcom,bus-dev = <&fab_mnoc>; qcom,buswidth = <16>; Loading Loading @@ -429,7 +429,7 @@ slv_srvc_mnoc: slv-srvc-mnoc { cell-id = <MSM_BUS_SLAVE_CNOC_MNOC_CFG>; cell-id = <MSM_BUS_SLAVE_SRVC_MNOC>; label = "slv-srvc-mnoc"; qcom,bus-dev = <&fab_mnoc>; qcom,buswidth = <16>; Loading Loading @@ -562,7 +562,7 @@ mas_pcie_0: mas-pcie-0 { cell-id = <MSM_BUS_MASTER_PCIE_0>; cell-id = <MSM_BUS_MASTER_PCIE>; label = "mas-pcie-0"; qcom,bus-dev = <&fab_snoc>; qcom,buswidth = <8>; Loading Loading @@ -611,7 +611,7 @@ mas_usb3: mas-usb3 { cell-id = <MSM_BUS_SLAVE_USB3>; cell-id = <MSM_BUS_MASTER_USB3>; label = "mas-usb3"; qcom,bus-dev = <&fab_snoc>; qcom,buswidth = <8>; Loading Loading @@ -860,7 +860,7 @@ mas_pnoc_cfg: mas-pnoc-cfg { cell-id = <MSM_BUS_SLAVE_PNOC_CFG>; cell-id = <MSM_BUS_MASTER_PNOC_CFG>; label = "mas-pnoc-cfg"; qcom,bus-dev = <&fab_pnoc>; qcom,buswidth = <8>; Loading Loading @@ -923,7 +923,7 @@ qcom,bus-dev = <&fab_pnoc>; qcom,buswidth = <8>; qcom,connections = <&slv_bam_dma &slv_sdcc_1 &slv_sdcc_3 &slv_blsp_2 &slv_sdcc_2 &slv_sdcc_4 &slv_tsif &slv_sdcc_2 &slv_sdcc_4 &slv_blsp_2 &slv_blsp_1 &slv_tsif &slv_usb_hs &slv_pdm &slv_prng>; qcom,mas-rpm-id = <ICBID_MASTER_SNOC_PNOC>; Loading
include/dt-bindings/msm/msm-bus-ids.h +8 −6 Original line number Diff line number Diff line Loading @@ -129,10 +129,11 @@ #define MSM_BUS_MASTER_CRYPTO_CORE2 97 #define MSM_BUS_MASTER_EMAC 98 #define MSM_BUS_MASTER_VPU_1 99 #define MSM_BUS_MASTER_PCIE_0 100 #define MSM_BUS_MASTER_PCIE_1 101 #define MSM_BUS_MASTER_USB3_1 102 #define MSM_BUS_MASTER_LAST 103 #define MSM_BUS_MASTER_PCIE_1 100 #define MSM_BUS_MASTER_USB3_1 101 #define MSM_BUS_MASTER_CNOC_MNOC_MMSS_CFG 102 #define MSM_BUS_MASTER_CNOC_MNOC_CFG 103 #define MSM_BUS_MASTER_LAST 104 #define MSM_BUS_SYSTEM_FPB_MASTER_SYSTEM MSM_BUS_SYSTEM_MASTER_SYSTEM_FPB #define MSM_BUS_CPSS_FPB_MASTER_SYSTEM MSM_BUS_SYSTEM_MASTER_CPSS_FPB Loading Loading @@ -182,7 +183,7 @@ #define MSM_BUS_SNOC_PNOC_SLV 10042 #define MSM_BUS_BIMC_INT_APPS_EBI 10043 #define MSM_BUS_BIMC_INT_APPS_SNOC 10044 #define MSM_BUS_INT_LAST 10043 #define MSM_BUS_INT_LAST 10045 #define MSM_BUS_SLAVE_FIRST 512 #define MSM_BUS_SLAVE_EBI_CH0 512 Loading Loading @@ -342,7 +343,8 @@ #define MSM_BUS_SLAVE_PCIE_1 666 #define MSM_BUS_SLAVE_PCIE_0_CFG 667 #define MSM_BUS_SLAVE_PCIE_1_CFG 668 #define MSM_BUS_SLAVE_LAST 669 #define MSM_BUS_SLAVE_SRVC_MNOC 669 #define MSM_BUS_SLAVE_LAST 670 #define MSM_BUS_SYSTEM_FPB_SLAVE_SYSTEM MSM_BUS_SYSTEM_SLAVE_SYSTEM_FPB #define MSM_BUS_CPSS_FPB_SLAVE_SYSTEM MSM_BUS_SYSTEM_SLAVE_CPSS_FPB Loading