Merge "msm: clean up memory.c" (8e278a5b) · Commits · e / devices / android_kernel_sony_msm8994

arch/arm/mach-msm/include/mach/memory.h

+0 −46

Original line number	Diff line number	Diff line
		@@ -38,36 +38,6 @@
		* SPARSEMEM and a 3G/1G VM split.
		*/

		#if defined(CONFIG_ARCH_MSM7X30)

		#define EBI0_PHYS_OFFSET PHYS_OFFSET
		#define EBI0_PAGE_OFFSET PAGE_OFFSET
		#define EBI0_SIZE 0x10000000

		#ifndef __ASSEMBLY__

		extern unsigned long ebi1_phys_offset;

		#define EBI1_PHYS_OFFSET (ebi1_phys_offset)
		#define EBI1_PAGE_OFFSET (EBI0_PAGE_OFFSET + EBI0_SIZE)

		#if (defined(CONFIG_SPARSEMEM) && defined(CONFIG_VMSPLIT_3G))

		#define __phys_to_virt(phys) \
		((phys) >= EBI1_PHYS_OFFSET ? \
		(phys) - EBI1_PHYS_OFFSET + EBI1_PAGE_OFFSET : \
		(phys) - EBI0_PHYS_OFFSET + EBI0_PAGE_OFFSET)

		#define __virt_to_phys(virt) \
		((virt) >= EBI1_PAGE_OFFSET ? \
		(virt) - EBI1_PAGE_OFFSET + EBI1_PHYS_OFFSET : \
		(virt) - EBI0_PAGE_OFFSET + EBI0_PHYS_OFFSET)

		#endif
		#endif

		#endif

		#ifndef __ASSEMBLY__
		void *allocate_contiguous_ebi(unsigned long, unsigned long, int);
		phys_addr_t allocate_contiguous_ebi_nomap(unsigned long, unsigned long);
		@@ -75,7 +45,6 @@ void clean_and_invalidate_caches(unsigned long, unsigned long, unsigned long);
		void clean_caches(unsigned long, unsigned long, unsigned long);
		void invalidate_caches(unsigned long, unsigned long, unsigned long);
		int msm_get_memory_type_from_name(const char *memtype_name);
		unsigned long get_ddr_size(void);

		#if defined(CONFIG_ARCH_MSM_ARM11) \|\| defined(CONFIG_ARCH_MSM_CORTEX_A5)
		void write_to_strongly_ordered_memory(void);
		@@ -87,11 +56,6 @@ extern void l2x0_cache_sync(void);
		#define finish_arch_switch(prev) do { l2x0_cache_sync(); } while (0)
		#endif

		#if defined(CONFIG_ARCH_MSM8X60) \|\| defined(CONFIG_ARCH_MSM8960)
		extern void store_ttbr0(void);
		#define finish_arch_switch(prev) do { store_ttbr0(); } while (0)
		#endif

		#define MAX_HOLE_ADDRESS (PHYS_OFFSET + 0x10000000)
		extern phys_addr_t memory_hole_offset;
		extern phys_addr_t memory_hole_start;
		@@ -144,14 +108,4 @@ extern char *__compat_exports_end[];

		#endif

		/* these correspond to values known by the modem */
		#define MEMORY_DEEP_POWERDOWN 0
		#define MEMORY_SELF_REFRESH 1
		#define MEMORY_ACTIVE 2

		#define NPA_MEMORY_NODE_NAME "/mem/apps/ddr_dpd"

		#ifndef CONFIG_ARCH_MSM7X27
		#define CONSISTENT_DMA_SIZE (SZ_1M * 14)

		#endif

arch/arm/mach-msm/memory.c

+2 −76

Original line number	Diff line number	Diff line
		@@ -30,11 +30,6 @@
		#include <mach/msm_memtypes.h>
		#include <mach/memory.h>
		#include <linux/hardirq.h>
		#if defined(CONFIG_MSM_NPA_REMOTE)
		#include "npa_remote.h"
		#include <linux/completion.h>
		#include <linux/err.h>
		#endif
		#include <mach/msm_iomap.h>
		#include <mach/socinfo.h>
		#include <linux/sched.h>
		@@ -44,43 +39,6 @@
		#include <asm/tlbflush.h>
		#include <../../mm/mm.h>

		#if defined(CONFIG_ARCH_MSM7X27)
		static void *strongly_ordered_page;
		static char strongly_ordered_mem[PAGE_SIZE*2-4];

		void __init map_page_strongly_ordered(void)
		{
		long unsigned int phys;
		struct map_desc map[1];

		if (strongly_ordered_page)
		return;

		strongly_ordered_page = (void*)PFN_ALIGN((int)&strongly_ordered_mem);
		phys = __pa(strongly_ordered_page);

		map[0].pfn = __phys_to_pfn(phys);
		map[0].virtual = MSM_STRONGLY_ORDERED_PAGE;
		map[0].length = PAGE_SIZE;
		map[0].type = MT_MEMORY_SO;
		iotable_init(map, ARRAY_SIZE(map));

		printk(KERN_ALERT "Initialized strongly ordered page successfully\n");
		}
		#else
		void map_page_strongly_ordered(void) { }
		#endif

		#if defined(CONFIG_ARCH_MSM7X27)
		void write_to_strongly_ordered_memory(void)
		{
		(int )MSM_STRONGLY_ORDERED_PAGE = 0;
		}
		#else
		void write_to_strongly_ordered_memory(void) { }
		#endif
		EXPORT_SYMBOL(write_to_strongly_ordered_memory);

		/* These cache related routines make the assumption (if outer cache is
		* available) that the associated physical memory is contiguous.
		* They will operate on all (L1 and L2 if present) caches.
		@@ -192,43 +150,22 @@ static void __init initialize_mempools(void)
		}
		}

		#define MAX_FIXED_AREA_SIZE 0x11000000

		void __init msm_reserve(void)
		{
		unsigned long msm_fixed_area_size;
		unsigned long msm_fixed_area_start;

		memory_pool_init();
		if (reserve_info->calculate_reserve_sizes)
		reserve_info->calculate_reserve_sizes();

		msm_fixed_area_size = reserve_info->fixed_area_size;
		msm_fixed_area_start = reserve_info->fixed_area_start;
		if (msm_fixed_area_size)
		if (msm_fixed_area_start > reserve_info->low_unstable_address
		- MAX_FIXED_AREA_SIZE)
		reserve_info->low_unstable_address =
		msm_fixed_area_start;

		calculate_reserve_limits();
		adjust_reserve_sizes();
		reserve_memory_for_mempools();
		initialize_mempools();
		}

		static int get_ebi_memtype(void)
		{
		/* on 7x30 and 8x55 "EBI1 kernel PMEM" is really on EBI0 */
		if (cpu_is_msm7x30() \|\| cpu_is_msm8x55())
		return MEMTYPE_EBI0;
		return MEMTYPE_EBI1;
		}

		void *allocate_contiguous_ebi(unsigned long size,
		unsigned long align, int cached)
		{
		return allocate_contiguous_memory(size, get_ebi_memtype(),
		return allocate_contiguous_memory(size, MEMTYPE_EBI1,
		align, cached);
		}
		EXPORT_SYMBOL(allocate_contiguous_ebi);
		@@ -236,7 +173,7 @@ EXPORT_SYMBOL(allocate_contiguous_ebi);
		phys_addr_t allocate_contiguous_ebi_nomap(unsigned long size,
		unsigned long align)
		{
		return _allocate_contiguous_memory_nomap(size, get_ebi_memtype(),
		return _allocate_contiguous_memory_nomap(size, MEMTYPE_EBI1,
		align, __builtin_return_address(0));
		}
		EXPORT_SYMBOL(allocate_contiguous_ebi_nomap);
		@@ -499,17 +436,6 @@ void adjust_meminfo(unsigned long start, unsigned long size)
		}
		}

		unsigned long get_ddr_size(void)
		{
		unsigned int i;
		unsigned long ret = 0;

		for (i = 0; i < meminfo.nr_banks; i++)
		ret += meminfo.bank[i].size;

		return ret;
		}

		/* Provide a string that anonymous device tree allocations (those not
		* directly associated with any driver) can use for their "compatible"
		* field */