Loading drivers/irqchip/irq-gic.c +20 −15 Original line number Diff line number Diff line Loading @@ -319,7 +319,7 @@ static void gic_eoi_irq(struct irq_data *d) raw_spin_unlock(&irq_controller_lock); } writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI); writel_relaxed_no_log(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI); } static int gic_set_type(struct irq_data *d, unsigned int type) Loading Loading @@ -395,8 +395,8 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, bit = gic_cpu_map[cpu] << shift; raw_spin_lock(&irq_controller_lock); val = readl_relaxed(reg) & ~mask; writel_relaxed(val | bit, reg); val = readl_relaxed_no_log(reg) & ~mask; writel_relaxed_no_log(val | bit, reg); raw_spin_unlock(&irq_controller_lock); return IRQ_SET_MASK_OK; Loading Loading @@ -439,7 +439,7 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs void __iomem *cpu_base = gic_data_cpu_base(gic); do { irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK); irqstat = readl_relaxed_no_log(cpu_base + GIC_CPU_INTACK); irqnr = irqstat & ~0x1c00; if (likely(irqnr > 15 && irqnr < 1021)) { Loading @@ -449,7 +449,7 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs continue; } if (irqnr < 16) { writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI); writel_relaxed_no_log(irqstat, cpu_base + GIC_CPU_EOI); #ifdef CONFIG_SMP handle_IPI(irqnr, regs); #endif Loading Loading @@ -729,19 +729,22 @@ static void gic_cpu_save(unsigned int gic_nr) if (!dist_base || !cpu_base) return; saved_cpu_ctrl = readl_relaxed(cpu_base + GIC_CPU_CTRL); saved_cpu_ctrl = readl_relaxed_no_log(cpu_base + GIC_CPU_CTRL); for (i = 0; i < DIV_ROUND_UP(32, 4); i++) gic_data[gic_nr].saved_dist_pri[i] = readl_relaxed(dist_base + gic_data[gic_nr].saved_dist_pri[i] = readl_relaxed_no_log( dist_base + GIC_DIST_PRI + i * 4); ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_enable); for (i = 0; i < DIV_ROUND_UP(32, 32); i++) ptr[i] = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4); ptr[i] = readl_relaxed_no_log(dist_base + GIC_DIST_ENABLE_SET + i * 4); ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_conf); for (i = 0; i < DIV_ROUND_UP(32, 16); i++) ptr[i] = readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4); ptr[i] = readl_relaxed_no_log(dist_base + GIC_DIST_CONFIG + i * 4); } Loading @@ -763,18 +766,20 @@ static void gic_cpu_restore(unsigned int gic_nr) ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_enable); for (i = 0; i < DIV_ROUND_UP(32, 32); i++) writel_relaxed(ptr[i], dist_base + GIC_DIST_ENABLE_SET + i * 4); writel_relaxed_no_log(ptr[i], dist_base + GIC_DIST_ENABLE_SET + i * 4); ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_conf); for (i = 0; i < DIV_ROUND_UP(32, 16); i++) writel_relaxed(ptr[i], dist_base + GIC_DIST_CONFIG + i * 4); writel_relaxed_no_log(ptr[i], dist_base + GIC_DIST_CONFIG + i * 4); for (i = 0; i < DIV_ROUND_UP(32, 4); i++) writel_relaxed(gic_data[gic_nr].saved_dist_pri[i], writel_relaxed_no_log(gic_data[gic_nr].saved_dist_pri[i], dist_base + GIC_DIST_PRI + i * 4); writel_relaxed(0xf0, cpu_base + GIC_CPU_PRIMASK); writel_relaxed(saved_cpu_ctrl, cpu_base + GIC_CPU_CTRL); writel_relaxed_no_log(0xf0, cpu_base + GIC_CPU_PRIMASK); writel_relaxed_no_log(saved_cpu_ctrl, cpu_base + GIC_CPU_CTRL); } static int gic_notifier(struct notifier_block *self, unsigned long cmd, void *v) Loading Loading @@ -852,7 +857,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) dsb(); /* this always happens on GIC0 */ writel_relaxed(sgir, writel_relaxed_no_log(sgir, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT); mb(); } Loading Loading
drivers/irqchip/irq-gic.c +20 −15 Original line number Diff line number Diff line Loading @@ -319,7 +319,7 @@ static void gic_eoi_irq(struct irq_data *d) raw_spin_unlock(&irq_controller_lock); } writel_relaxed(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI); writel_relaxed_no_log(gic_irq(d), gic_cpu_base(d) + GIC_CPU_EOI); } static int gic_set_type(struct irq_data *d, unsigned int type) Loading Loading @@ -395,8 +395,8 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, bit = gic_cpu_map[cpu] << shift; raw_spin_lock(&irq_controller_lock); val = readl_relaxed(reg) & ~mask; writel_relaxed(val | bit, reg); val = readl_relaxed_no_log(reg) & ~mask; writel_relaxed_no_log(val | bit, reg); raw_spin_unlock(&irq_controller_lock); return IRQ_SET_MASK_OK; Loading Loading @@ -439,7 +439,7 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs void __iomem *cpu_base = gic_data_cpu_base(gic); do { irqstat = readl_relaxed(cpu_base + GIC_CPU_INTACK); irqstat = readl_relaxed_no_log(cpu_base + GIC_CPU_INTACK); irqnr = irqstat & ~0x1c00; if (likely(irqnr > 15 && irqnr < 1021)) { Loading @@ -449,7 +449,7 @@ static asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs continue; } if (irqnr < 16) { writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI); writel_relaxed_no_log(irqstat, cpu_base + GIC_CPU_EOI); #ifdef CONFIG_SMP handle_IPI(irqnr, regs); #endif Loading Loading @@ -729,19 +729,22 @@ static void gic_cpu_save(unsigned int gic_nr) if (!dist_base || !cpu_base) return; saved_cpu_ctrl = readl_relaxed(cpu_base + GIC_CPU_CTRL); saved_cpu_ctrl = readl_relaxed_no_log(cpu_base + GIC_CPU_CTRL); for (i = 0; i < DIV_ROUND_UP(32, 4); i++) gic_data[gic_nr].saved_dist_pri[i] = readl_relaxed(dist_base + gic_data[gic_nr].saved_dist_pri[i] = readl_relaxed_no_log( dist_base + GIC_DIST_PRI + i * 4); ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_enable); for (i = 0; i < DIV_ROUND_UP(32, 32); i++) ptr[i] = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4); ptr[i] = readl_relaxed_no_log(dist_base + GIC_DIST_ENABLE_SET + i * 4); ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_conf); for (i = 0; i < DIV_ROUND_UP(32, 16); i++) ptr[i] = readl_relaxed(dist_base + GIC_DIST_CONFIG + i * 4); ptr[i] = readl_relaxed_no_log(dist_base + GIC_DIST_CONFIG + i * 4); } Loading @@ -763,18 +766,20 @@ static void gic_cpu_restore(unsigned int gic_nr) ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_enable); for (i = 0; i < DIV_ROUND_UP(32, 32); i++) writel_relaxed(ptr[i], dist_base + GIC_DIST_ENABLE_SET + i * 4); writel_relaxed_no_log(ptr[i], dist_base + GIC_DIST_ENABLE_SET + i * 4); ptr = __this_cpu_ptr(gic_data[gic_nr].saved_ppi_conf); for (i = 0; i < DIV_ROUND_UP(32, 16); i++) writel_relaxed(ptr[i], dist_base + GIC_DIST_CONFIG + i * 4); writel_relaxed_no_log(ptr[i], dist_base + GIC_DIST_CONFIG + i * 4); for (i = 0; i < DIV_ROUND_UP(32, 4); i++) writel_relaxed(gic_data[gic_nr].saved_dist_pri[i], writel_relaxed_no_log(gic_data[gic_nr].saved_dist_pri[i], dist_base + GIC_DIST_PRI + i * 4); writel_relaxed(0xf0, cpu_base + GIC_CPU_PRIMASK); writel_relaxed(saved_cpu_ctrl, cpu_base + GIC_CPU_CTRL); writel_relaxed_no_log(0xf0, cpu_base + GIC_CPU_PRIMASK); writel_relaxed_no_log(saved_cpu_ctrl, cpu_base + GIC_CPU_CTRL); } static int gic_notifier(struct notifier_block *self, unsigned long cmd, void *v) Loading Loading @@ -852,7 +857,7 @@ void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) dsb(); /* this always happens on GIC0 */ writel_relaxed(sgir, writel_relaxed_no_log(sgir, gic_data_dist_base(&gic_data[0]) + GIC_DIST_SOFTINT); mb(); } Loading