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Commit 78fe01a5 authored by Yoichi Yuasa's avatar Yoichi Yuasa Committed by Ralf Baechle
Browse files

MIPS: MIPSsim: Fix unbalance brace in mipssim get_c0_compare_int() 



cc1: warnings being treated as errors
arch/mips/mipssim/sim_time.c: In function 'get_c0_compare_int':
arch/mips/mipssim/sim_time.c:103: warning: ISO C90 forbids mixed declarations and code
arch/mips/mipssim/sim_time.c:116: error: expected declaration or statement at end of input
make[1]: *** [arch/mips/mipssim/sim_time.o] Error 1

Signed-off-by: default avatarYoichi Yuasa <yuasa@linux-mips.org>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 7d35cdc0

arch/mips/mipssim/sim_time.c

+6 −6
Original line number Original line Diff line number Diff line
@@ -89,13 +89,13 @@ unsigned __cpuinit get_c0_compare_int(void) 
	if (cpu_has_veic) {

	if (cpu_has_veic) {

		set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);

		set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch);

		mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;

		mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR;

	} else {



		return mips_cpu_timer_irq;

	}

#endif

#endif

	       {

	if (cpu_has_vint)

	if (cpu_has_vint)

		set_vi_handler(cp0_compare_irq, mips_timer_dispatch);

		set_vi_handler(cp0_compare_irq, mips_timer_dispatch);

	mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;

	mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;

	}





	return mips_cpu_timer_irq;

	return mips_cpu_timer_irq;

}

}