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Commit 6e6ec3f7 authored by Sahitya Tummala's avatar Sahitya Tummala
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scsi: ufs-msm: Enable clock gating



Enable relevant PHY clocks to be turned off as part of ufshcd
clock gating. Also, enable clock gating by setting necessary
capabilities.

The clock gating delay is currently set to 150ms by default. It can
be changed if required via sysfs -
echo xx > /sys/bus/platform/devices/msm_ufs.1/clkgate_delay_ms

Change-Id: I41c0b4c560711540cc0630e752d7843fca3fb26c
Signed-off-by: default avatarSahitya Tummala <stummala@codeaurora.org>
parent 9c35c515
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