Merge "ARM: dts: msm: add dt support for etm save and restore for 8936"

		qcom,synchronous-cluster-id = <0>;

		qcom,synchronous-cluster-map = <0 0x0F>;

	};

	jtag_fuse: jtagfuse@5e01c {

		compatible = "qcom,jtag-fuse";

		reg = <0x5e01c 0x8>;

		reg-names = "fuse-base";

	};

	jtag_mm0: jtagmm@8fc000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x8fc000 0x1000>,

		      <0x8f0000 0x1000>;

		reg-names = "etm-base", "debug-base";

		clocks = <&clock_rpm clk_qdss_clk>,

		         <&clock_rpm clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";

		qcom,coresight-jtagmm-cpu = <&CPU0>;

	};

	jtag_mm1: jtagmm@8fd000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x8fd000 0x1000>,

		      <0x8f2000 0x1000>;

		reg-names = "etm-base", "debug-base";

		clocks = <&clock_rpm clk_qdss_clk>,

		         <&clock_rpm clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";

		qcom,coresight-jtagmm-cpu = <&CPU1>;

	};

	jtag_mm2: jtagmm@8fe000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x8fe000 0x1000>,

		      <0x8f4000 0x1000>;

		reg-names = "etm-base", "debug-base";

		clocks = <&clock_rpm clk_qdss_clk>,

		         <&clock_rpm clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";

		qcom,coresight-jtagmm-cpu = <&CPU2>;

	};

	jtag_mm3: jtagmm@8ff000 {

		compatible = "qcom,jtagv8-mm";

		reg = <0x8ff000 0x1000>,

		      <0x8f6000 0x1000>;

		reg-names = "etm-base", "debug-base";

		clocks = <&clock_rpm clk_qdss_clk>,

		         <&clock_rpm clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";

		qcom,coresight-jtagmm-cpu = <&CPU3>;

	};

};