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Commit 69d80cbe authored by Sudheer Papothi's avatar Sudheer Papothi
Browse files

ARM: dts: msm: Add pinctrl for AUXPCM and MI2S 



AUXPCM and MI2S gpios are used for BT and FM usecases. Add
pin control configuration for AUXPCM and MI2S gpios for MSM8994.

Change-Id: Icc398536d21e1fb2fb152ae7475bf3bf55206f28
Signed-off-by: default avatarSudheer Papothi <spapothi@codeaurora.org>
parent 02a2c6ee

arch/arm/boot/dts/qcom/msm8994-pinctrl.dtsi

+62 −0
Original line number Diff line number Diff line
@@ -983,5 +983,67 @@ 
				bias-pull-down;

			};

		};



		pmx_sec_aux_pcm {

			qcom,pins = <&gp 79>, <&gp 80>, <&gp 82>;

			qcom,num-grp-pins = <3>;

			qcom,pin-func = <1>;

			label = "sec_aux_pcm";

			sec_aux_pcm_sleep: sec_aux_pcm_sleep {

				drive-strength = <2>;	/* 2 mA */

				bias-pull-down;		/* PULL DOWN */

			};

			sec_aux_pcm_active: sec_aux_pcm_active {

				drive-strength = <8>;	/* 8 mA */

				bias-disable;		/* NO PULL */

				output-high;

			};

		};



		pmx_sec_aux_pcm_din {

			qcom,pins = <&gp 81>;

			qcom,num-grp-pins = <1>;

			qcom,pin-func = <1>;

			label = "sec_aux_pcm_din";

			sec_aux_pcm_din_sleep: sec_aux_pcm_din_sleep {

				drive-strength = <2>;	/* 2 mA */

				bias-pull-down;		/* PULL DOWN */

			};

			sec_aux_pcm_din_active: sec_aux_pcm_din_active {

				drive-strength = <8>;	/* 8 mA */

				bias-disable;		/* NO PULL */

			};

		};



		pmx_pri_mi2s {

			qcom,pins = <&gp 65>, <&gp 66>;

			qcom,num-grp-pins = <2>;

			qcom,pin-func = <1>;

			label = "pri_mi2s";

			pri_mi2s_sleep: pri_mi2s_sleep {

				drive-strength = <2>;	/* 2 mA */

				bias-pull-down;		/* PULL DOWN */

			};

			pri_mi2s_active: pri_mi2s_active {

				drive-strength = <8>;	/* 8 mA */

				bias-disable;		/* NO PULL */

				output-high;

			};

		};



		pmx_pri_mi2s_sd0 {

			qcom,pins = <&gp 67>;

			qcom,num-grp-pins = <1>;

			qcom,pin-func = <1>;

			label = "pri_mi2s_sd0";

			pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep {

				drive-strength = <2>;	/* 2 mA */

				bias-pull-down;		/* PULL DOWN */

			};

			pri_mi2s_sd0_active: pri_mi2s_sd0_active {

				drive-strength = <8>;	/* 8 mA */

				bias-disable;		/* NO PULL */

			};

		};

	};

};

arch/arm/boot/dts/qcom/msm8994.dtsi

+10 −11
Original line number Diff line number Diff line
@@ -1960,15 +1960,14 @@ 
		clocks = <&clock_rpm clk_div_clk1>;

		qcom,cdc-mclk-gpios = <&pm8994_gpios 15 0>;

		qcom,tomtom-mclk-clk-freq = <9600000>;

		qcom,prim-auxpcm-gpio-clk  = <&msm_gpio 74 0>;

		qcom,prim-auxpcm-gpio-sync = <&msm_gpio 75 0>;

		qcom,prim-auxpcm-gpio-din  = <&msm_gpio 76 0>;

		qcom,prim-auxpcm-gpio-dout = <&msm_gpio 77 0>;

		qcom,prim-auxpcm-gpio-set = "prim-gpio-tert";

		qcom,sec-auxpcm-gpio-clk  = <&msm_gpio 79 0>;

		qcom,sec-auxpcm-gpio-sync = <&msm_gpio 80 0>;

		qcom,sec-auxpcm-gpio-din  = <&msm_gpio 81 0>;

		qcom,sec-auxpcm-gpio-dout = <&msm_gpio 82 0>;

		pinctrl-names = "mi2s-sleep",

				"mi2s-active",

				"auxpcm-sleep",

				"auxpcm-active";

		pinctrl-0 = <&pri_mi2s_sleep>, <&pri_mi2s_sd0_sleep>;

		pinctrl-1 = <&pri_mi2s_active>, <&pri_mi2s_sd0_active>;

		pinctrl-2 = <&sec_aux_pcm_sleep>, <&sec_aux_pcm_din_sleep>;

		pinctrl-3 = <&sec_aux_pcm_active>, <&sec_aux_pcm_din_active>;

	};



	qcom,msm-adsp-loader {
@@ -2190,8 +2189,8 @@ 
		qcom,msm-dai-q6-mi2s-prim {

			compatible = "qcom,msm-dai-q6-mi2s";

			qcom,msm-dai-q6-mi2s-dev-id = <0>;

			qcom,msm-mi2s-rx-lines = <1>;

			qcom,msm-mi2s-tx-lines = <2>;

			qcom,msm-mi2s-rx-lines = <2>;

			qcom,msm-mi2s-tx-lines = <1>;

		};

	};