Loading arch/arm/boot/dts/qcom/msm8992.dtsi +111 −0 Original line number Diff line number Diff line Loading @@ -84,6 +84,15 @@ compatible = "arm,arch-cache"; cache-level = <2>; power-domain = <&l2ccc_0>; qcom,dump-size = <0x0>; /* A53 L2 dump not supported */ }; L1_I_0: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; L1_D_0: l1-dcache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; }; Loading @@ -95,6 +104,14 @@ qcom,acc = <&acc1>; qcom,ldo = <&ldo1>; next-level-cache = <&L2_0>; L1_I_1: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; L1_D_1: l1-dcache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; }; CPU2: cpu@2 { Loading @@ -105,6 +122,14 @@ qcom,acc = <&acc2>; qcom,ldo = <&ldo2>; next-level-cache = <&L2_0>; L1_I_2: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; L1_D_2: l1-dcache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; }; CPU3: cpu@3 { Loading @@ -115,6 +140,14 @@ qcom,acc = <&acc3>; qcom,ldo = <&ldo3>; next-level-cache = <&L2_0>; L1_I_3: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; L1_D_3: l1-dcache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; }; CPU4: cpu@100 { Loading @@ -129,6 +162,15 @@ compatible = "arm,arch-cache"; cache-level = <2>; power-domain = <&l2ccc_1>; qcom,dump-size = <0x140040>; }; L1_I_100: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0xd840>; }; L1_D_100: l1-dcache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; }; Loading @@ -140,6 +182,14 @@ qcom,acc = <&acc5>; qcom,ldo = <&ldo5>; next-level-cache = <&L2_1>; L1_I_101: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0xd840>; }; L1_D_101: l1-dcache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; }; }; Loading Loading @@ -2741,6 +2791,67 @@ reg-names = "avtimer_lsb_addr", "avtimer_msb_addr"; qcom,clk_div = <27>; }; cpuss_dump { compatible = "qcom,cpuss-dump"; qcom,l2_dump0 { qcom,dump-node = <&L2_0>; /* L2 cache dump for A53 cluster */ qcom,dump-id = <0xC0>; }; qcom,l2_dump1 { qcom,dump-node = <&L2_1>; /* L2 cache dump for A57 cluster */ qcom,dump-id = <0xC1>; }; qcom,l1_i_cache0 { qcom,dump-node = <&L1_I_0>; qcom,dump-id = <0x60>; }; qcom,l1_i_cache1 { qcom,dump-node = <&L1_I_1>; qcom,dump-id = <0x61>; }; qcom,l1_i_cache2 { qcom,dump-node = <&L1_I_2>; qcom,dump-id = <0x62>; }; qcom,l1_i_cache3 { qcom,dump-node = <&L1_I_3>; qcom,dump-id = <0x63>; }; qcom,l1_i_cache100 { qcom,dump-node = <&L1_I_100>; qcom,dump-id = <0x64>; }; qcom,l1_i_cache101 { qcom,dump-node = <&L1_I_101>; qcom,dump-id = <0x65>; }; qcom,l1_d_cache0 { qcom,dump-node = <&L1_D_0>; qcom,dump-id = <0x80>; }; qcom,l1_d_cache1 { qcom,dump-node = <&L1_D_1>; qcom,dump-id = <0x81>; }; qcom,l1_d_cache2 { qcom,dump-node = <&L1_D_2>; qcom,dump-id = <0x82>; }; qcom,l1_d_cache3 { qcom,dump-node = <&L1_D_3>; qcom,dump-id = <0x83>; }; qcom,l1_d_cache100 { qcom,dump-node = <&L1_D_100>; qcom,dump-id = <0x84>; }; qcom,l1_d_cache101 { qcom,dump-node = <&L1_D_101>; qcom,dump-id = <0x85>; }; }; }; &gdsc_usb30 { Loading Loading
arch/arm/boot/dts/qcom/msm8992.dtsi +111 −0 Original line number Diff line number Diff line Loading @@ -84,6 +84,15 @@ compatible = "arm,arch-cache"; cache-level = <2>; power-domain = <&l2ccc_0>; qcom,dump-size = <0x0>; /* A53 L2 dump not supported */ }; L1_I_0: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; L1_D_0: l1-dcache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; }; Loading @@ -95,6 +104,14 @@ qcom,acc = <&acc1>; qcom,ldo = <&ldo1>; next-level-cache = <&L2_0>; L1_I_1: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; L1_D_1: l1-dcache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; }; CPU2: cpu@2 { Loading @@ -105,6 +122,14 @@ qcom,acc = <&acc2>; qcom,ldo = <&ldo2>; next-level-cache = <&L2_0>; L1_I_2: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; L1_D_2: l1-dcache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; }; CPU3: cpu@3 { Loading @@ -115,6 +140,14 @@ qcom,acc = <&acc3>; qcom,ldo = <&ldo3>; next-level-cache = <&L2_0>; L1_I_3: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; L1_D_3: l1-dcache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; }; CPU4: cpu@100 { Loading @@ -129,6 +162,15 @@ compatible = "arm,arch-cache"; cache-level = <2>; power-domain = <&l2ccc_1>; qcom,dump-size = <0x140040>; }; L1_I_100: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0xd840>; }; L1_D_100: l1-dcache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; }; Loading @@ -140,6 +182,14 @@ qcom,acc = <&acc5>; qcom,ldo = <&ldo5>; next-level-cache = <&L2_1>; L1_I_101: l1-icache { compatible = "arm,arch-cache"; qcom,dump-size = <0xd840>; }; L1_D_101: l1-dcache { compatible = "arm,arch-cache"; qcom,dump-size = <0x9040>; }; }; }; Loading Loading @@ -2741,6 +2791,67 @@ reg-names = "avtimer_lsb_addr", "avtimer_msb_addr"; qcom,clk_div = <27>; }; cpuss_dump { compatible = "qcom,cpuss-dump"; qcom,l2_dump0 { qcom,dump-node = <&L2_0>; /* L2 cache dump for A53 cluster */ qcom,dump-id = <0xC0>; }; qcom,l2_dump1 { qcom,dump-node = <&L2_1>; /* L2 cache dump for A57 cluster */ qcom,dump-id = <0xC1>; }; qcom,l1_i_cache0 { qcom,dump-node = <&L1_I_0>; qcom,dump-id = <0x60>; }; qcom,l1_i_cache1 { qcom,dump-node = <&L1_I_1>; qcom,dump-id = <0x61>; }; qcom,l1_i_cache2 { qcom,dump-node = <&L1_I_2>; qcom,dump-id = <0x62>; }; qcom,l1_i_cache3 { qcom,dump-node = <&L1_I_3>; qcom,dump-id = <0x63>; }; qcom,l1_i_cache100 { qcom,dump-node = <&L1_I_100>; qcom,dump-id = <0x64>; }; qcom,l1_i_cache101 { qcom,dump-node = <&L1_I_101>; qcom,dump-id = <0x65>; }; qcom,l1_d_cache0 { qcom,dump-node = <&L1_D_0>; qcom,dump-id = <0x80>; }; qcom,l1_d_cache1 { qcom,dump-node = <&L1_D_1>; qcom,dump-id = <0x81>; }; qcom,l1_d_cache2 { qcom,dump-node = <&L1_D_2>; qcom,dump-id = <0x82>; }; qcom,l1_d_cache3 { qcom,dump-node = <&L1_D_3>; qcom,dump-id = <0x83>; }; qcom,l1_d_cache100 { qcom,dump-node = <&L1_D_100>; qcom,dump-id = <0x84>; }; qcom,l1_d_cache101 { qcom,dump-node = <&L1_D_101>; qcom,dump-id = <0x85>; }; }; }; &gdsc_usb30 { Loading