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Commit 5f72341e authored by Vikram Mulukutla's avatar Vikram Mulukutla
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ARM: dts: msm: Increase A57 and A53 fmaxes for MSM8994V2



Characterization has been done to safely enable 1.9584GHz for
the A57 cluster on MSM8994v2, and 1.4784GHz for the A53 cluster.
Add these frequencies and update the mapping (frequency to b/w)
tables.

Change-Id: I8dee90138de4be4bc8bb2a4648f78c7948008dba
Signed-off-by: default avatarVikram Mulukutla <markivx@codeaurora.org>
parent d52c796d
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+7 −10
Original line number Diff line number Diff line
@@ -663,7 +663,7 @@
				<9   960000000>,
				<10 1248000000>,
				<11 1344000000>,
				<12 1440000000>;
				<12 1478400000>;
		qcom,cpr-speed-bin-max-corners =
				<0xFFFFFFFF 0 1 4 7 12>;
		qcom,cpr-enable;
@@ -677,7 +677,7 @@
		regulator-name = "apc1_corner";
		qcom,cpr-fuse-corners = <4>;
		regulator-min-microvolt = <1>;
		regulator-max-microvolt = <17>;
		regulator-max-microvolt = <16>;

		qcom,cpr-voltage-ceiling = <900000 900000 1000000 1180000>;
		qcom,cpr-voltage-floor =   <725000 725000  840000 1000000>;
@@ -722,19 +722,17 @@
		qcom,cpr-init-voltage-ref = <900000 900000 1000000 1225000>;
		qcom,cpr-init-voltage-step = <10000>;

		qcom,cpr-corner-map = <1 2 2 2 2 3 3 3 4 4 4 4 4 4 4 4 4>;
		qcom,cpr-corner-map = <1 2 2 2 2 3 3 3 4 4 4 4 4 4 4 4>;
		qcom,cpr-voltage-ceiling-override =
				<0xFFFFFFFF 0  900000  900000  900000  900000
					       900000 1000000 1000000 1000000
					      1115000 1115000 1115000 1115000
					      1115000 1180000 1180000 1180000
					      1180000>;
					      1115000 1180000 1180000 1180000>;
		qcom,cpr-voltage-floor-override =
				<0xFFFFFFFF 0 700000 700000 700000 700000
					      725000 795000 815000 835000
					      865000 880000 895000 915000
					      935000 940000 960000 970000
					      990000>;
					      935000 940000 960000 990000>;

		qcom,cpr-scaled-init-voltage-as-ceiling;
		qcom,cpr-voltage-scaling-factor-max = <0 0 2000 2000>;
@@ -755,10 +753,9 @@
				<13 1632000000>,
				<14 1728000000>,
				<15 1824000000>,
				<16 1920000000>,
				<17 1996800000>;
				<16 1958400000>;
		qcom,cpr-speed-bin-max-corners =
				<0xFFFFFFFF 0 1 5 8 17>;
				<0xFFFFFFFF 0 1 5 8 16>;
		qcom,cpr-enable;
	};

+18 −14
Original line number Diff line number Diff line
@@ -91,7 +91,7 @@
			<  960000000 9>,
			< 1248000000 10>,
			< 1344000000 11>,
			< 1440000000 12>;
			< 1478400000 12>;
	qcom,a57-speedbin0-v0 =
			<	   0 0>,
			<  300000000 2>,
@@ -100,7 +100,15 @@
			<  633600000 5>,
			<  768000000 6>,
			<  864000000 7>,
			<  960000000 8>;
			<  960000000 8>,
			< 1248000000 9>,
			< 1344000000 10>,
			< 1440000000 11>,
			< 1536000000 12>,
			< 1632000000 13>,
			< 1728000000 14>,
			< 1824000000 15>,
			< 1958400000 16>;
	qcom,cci-speedbin0-v0 =
			<	   0 0>,
			<  300000000 4>,
@@ -133,7 +141,7 @@
		<  960000 >,
		< 1248000 >,
		< 1344000 >,
		< 1440000 >;
		< 1478400 >;

	qcom,cpufreq-table-4 =
		<  300000 >,
@@ -150,8 +158,7 @@
		< 1632000 >,
		< 1728000 >,
		< 1824000 >,
		< 1920000 >,
		< 1996800 >;
		< 1958400 >;
};

&devfreq_cpufreq {
@@ -167,7 +174,7 @@
			<  960000  5928 >,
			< 1248000  7904 >,
			< 1344000  9887 >,
			< 1440000 11863 >;
			< 1478400 11863 >;
		cpu-to-dev-map-4 =
			<  300000  1525 >,
			<  384000  1525 >,
@@ -183,8 +190,7 @@
			< 1632000  9887 >,
			< 1728000  9887 >,
			< 1824000 11863 >,
			< 1920000 11863 >,
			< 1996800 11863 >;
			< 1958400 11863 >;
	};

	mincpubw-cpufreq {
@@ -200,7 +206,7 @@
			<  960000 5928 >,
			< 1248000 5928 >,
			< 1344000 5928 >,
			< 1440000 5928 >;
			< 1478400 5928 >;
		cpu-to-dev-map-4 =
			<  300000 1525 >,
			<  384000 2288 >,
@@ -216,8 +222,7 @@
			< 1632000 5928 >,
			< 1728000 5928 >,
			< 1824000 5928 >,
			< 1920000 5928 >,
			< 1996800 5928 >;
			< 1958400 5928 >;
	};

	cci-cpufreq {
@@ -232,7 +237,7 @@
			<  960000 600000 >,
			< 1248000 729600 >,
			< 1344000 787200 >,
			< 1440000 787200 >;
			< 1478400 787200 >;
		cpu-to-dev-map-4 =
			<  300000 300000 >,
			<  384000 300000 >,
@@ -248,8 +253,7 @@
			< 1632000 787200 >,
			< 1728000 787200 >,
			< 1824000 787200 >,
			< 1920000 787200 >,
			< 1996800 787200 >;
			< 1958400 787200 >;
	};
};