Commit 58e9eaf0 authored Oct 19, 2012 by Vince Weaver Committed by Ingo Molnar Oct 24, 2012

perf/x86: Remove P6 cpuc->enabled check

Between 2.6.33 and 2.6.34 the PMU code was made modular.

The x86_pmu_enable() call was extended to disable cpuc->enabled
and iterate the counters, enabling one at a time, before calling
enable_all() at the end, followed by re-enabling cpuc->enabled.

Since cpuc->enabled was set to 0, that change effectively caused
the "val |= ARCH_PERFMON_EVENTSEL_ENABLE;" code in p6_pmu_enable_event()
and p6_pmu_disable_event() to be dead code that was never called.

This change removes this code (which was confusing) and adds some
extra commentary to make it more clear what is going on.

Signed-off-by: Vince Weaver <vincent.weaver@maine.edu>
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1210191732000.14552@vincent-weaver-1.um.maine.edu

Signed-off-by: Ingo Molnar <mingo@kernel.org>

parent e09df478

arch/x86/kernel/cpu/perf_event_p6.c

+7 −7

Original line number	Diff line number	Diff line
		@@ -157,25 +157,25 @@ static void p6_pmu_enable_all(int added)
		static inline void
		p6_pmu_disable_event(struct perf_event *event)
		{
		struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
		struct hw_perf_event *hwc = &event->hw;
		u64 val = P6_NOP_EVENT;

		if (cpuc->enabled)
		val \|= ARCH_PERFMON_EVENTSEL_ENABLE;

		(void)wrmsrl_safe(hwc->config_base, val);
		}

		static void p6_pmu_enable_event(struct perf_event *event)
		{
		struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
		struct hw_perf_event *hwc = &event->hw;
		u64 val;

		val = hwc->config;
		if (cpuc->enabled)
		val \|= ARCH_PERFMON_EVENTSEL_ENABLE;

		/*
		* p6 only has a global event enable, set on PerfEvtSel0
		* We "disable" events by programming P6_NOP_EVENT
		* and we rely on p6_pmu_enable_all() being called
		* to actually enable the events.
		*/

		(void)wrmsrl_safe(hwc->config_base, val);
		}