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Commit 57c79ad3 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add SDHC nodes for MTP/CDP for MSM8916"

parents 768f0491 b7dd5786

arch/arm/boot/dts/qcom/msm8916-cdp.dtsi

+47 −0
Original line number Diff line number Diff line
@@ -24,3 +24,50 @@ 
	pinctrl-names = "default";

	pinctrl-0 = <&uart_console_sleep>;

};



&sdhc_1 {

	vdd-supply = <&pm8916_l8>;

	qcom,vdd-voltage-level = <2900000 2900000>;

	qcom,vdd-current-level = <200 400000>;



	vdd-io-supply = <&pm8916_l5>;

	qcom,vdd-io-always-on;

	qcom,vdd-io-lpm-sup;

	qcom,vdd-io-voltage-level = <1800000 1800000>;

	qcom,vdd-io-current-level = <200 60000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;

	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;



	qcom,nonremovable;



	status = "ok";

};



&sdhc_2 {

	vdd-supply = <&pm8916_l11>;

	qcom,vdd-voltage-level = <2800000 2950000>;

	qcom,vdd-current-level = <15000 400000>;



	vdd-io-supply = <&pm8916_l12>;

	qcom,vdd-io-voltage-level = <1800000 2950000>;

	qcom,vdd-io-current-level = <200 50000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;



	#address-cells = <0>;

	interrupt-parent = <&sdhc_2>;

	interrupts = <0 1 2>;

	#interrupt-cells = <1>;

	interrupt-map-mask = <0xffffffff>;

	interrupt-map = <0 &intc 0 125 0

			1 &intc 0 221 0

			2 &msm_gpio 38 0>;

	interrupt-names = "hc_irq", "pwr_irq", "status_irq";

	cd-gpios = <&msm_gpio 38 0x1>;



	status = "ok";

};

arch/arm/boot/dts/qcom/msm8916-mtp.dtsi

+47 −0
Original line number Diff line number Diff line
@@ -24,3 +24,50 @@ 
	pinctrl-names = "default";

	pinctrl-0 = <&uart_console_sleep>;

};



&sdhc_1 {

	vdd-supply = <&pm8916_l8>;

	qcom,vdd-voltage-level = <2900000 2900000>;

	qcom,vdd-current-level = <200 400000>;



	vdd-io-supply = <&pm8916_l5>;

	qcom,vdd-io-always-on;

	qcom,vdd-io-lpm-sup;

	qcom,vdd-io-voltage-level = <1800000 1800000>;

	qcom,vdd-io-current-level = <200 60000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>;

	pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>;



	qcom,nonremovable;



	status = "ok";

};



&sdhc_2 {

	vdd-supply = <&pm8916_l11>;

	qcom,vdd-voltage-level = <2800000 2950000>;

	qcom,vdd-current-level = <15000 400000>;



	vdd-io-supply = <&pm8916_l12>;

	qcom,vdd-io-voltage-level = <1800000 2950000>;

	qcom,vdd-io-current-level = <200 50000>;



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>;



	#address-cells = <0>;

	interrupt-parent = <&sdhc_2>;

	interrupts = <0 1 2>;

	#interrupt-cells = <1>;

	interrupt-map-mask = <0xffffffff>;

	interrupt-map = <0 &intc 0 125 0

			1 &intc 0 221 0

			2 &msm_gpio 38 0>;

	interrupt-names = "hc_irq", "pwr_irq", "status_irq";

	cd-gpios = <&msm_gpio 38 0x1>;



	status = "ok";

};

arch/arm/boot/dts/qcom/msm8916.dtsi

+8 −2
Original line number Diff line number Diff line
@@ -432,10 +432,14 @@ 
				<78 512 2048000 4096000>; /* Max. bandwidth */

		qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000

						100000000 200000000 4294967295>;

		status = "disabled";

		clocks = <&clock_gcc clk_gcc_sdcc1_ahb_clk>,

			 <&clock_gcc clk_gcc_sdcc1_apps_clk>;

		clock-names = "iface_clk", "core_clk";



		qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;

		qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v";



		status = "disabled";

	};



	sdhc_2: sdhci@07864000 {
@@ -461,11 +465,13 @@ 
				<81 512 2048000 4096000>; /* Max. bandwidth */

		qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000

						100000000 200000000 4294967295>;

		status = "disabled";

		clocks = <&clock_gcc clk_gcc_sdcc2_ahb_clk>,

			 <&clock_gcc clk_gcc_sdcc2_apps_clk>;

		clock-names = "iface_clk", "core_clk";



		qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;



		status = "disabled";

	};



	qcom,ipc-spinlock@1905000 {