Commit 4825e88e authored Sep 16, 2013 by Jack Pham

usb: dwc3-msm: Fix bug in PHY reset sequence



When performing reset on the DWC3 controller's UTMI HSPHY
interface, only bit 31 of DWC3_GUSB2PHYCFG(0) should be
asserted. Fix the code which is incorrectly writing to
bits 28-31 and only clearing bit 31.

Change-Id: I4a2acf05974e7002f5592e8977eaab775342f57d
Signed-off-by: Jack Pham <jackp@codeaurora.org>

parent 623c95fc

drivers/usb/dwc3/dwc3-msm.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -1572,7 +1572,7 @@ static int dwc3_msm_resume(struct dwc3_msm *mdwc)
		/* Reset UTMI HSPHY interface */
		dwc3_msm_write_reg(mdwc->base, DWC3_GUSB2PHYCFG(0),
		dwc3_msm_read_reg(mdwc->base, DWC3_GUSB2PHYCFG(0)) \|
		0xF0000000);
		0x80000000);
		/* 10usec delay required before de-asserting PHY RESET */
		udelay(10);
		dwc3_msm_write_reg(mdwc->base, DWC3_GUSB2PHYCFG(0),