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Commit 40888895 authored by Tianyi Gou's avatar Tianyi Gou
Browse files

msm: clock-8084: Add PCIE and SATA LDO 



PCIE and SATA have LDOs that drivers need to control. Therefore,
add them in this patch.

Change-Id: I25e0abee0e21e47495bdd81475d643d48d1d6bae
Signed-off-by: default avatarTianyi Gou <tgou@codeaurora.org>
parent 12065ccb

arch/arm/mach-msm/clock-8084.c

+38 −0
Original line number Diff line number Diff line
@@ -5185,6 +5185,39 @@ static struct branch_clk mdss_pclk1_clk = { 
	},

};



static struct gate_clk pcie_0_phy_ldo = {

	.en_reg = PCIE_0_PHY_LDO_EN,

	.en_mask = BIT(0),

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "pcie_0_phy_ldo",

		.ops = &clk_ops_gate,

		CLK_INIT(pcie_0_phy_ldo.c),

	},

};



static struct gate_clk pcie_1_phy_ldo = {

	.en_reg = PCIE_1_PHY_LDO_EN,

	.en_mask = BIT(0),

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "pcie_1_phy_ldo",

		.ops = &clk_ops_gate,

		CLK_INIT(pcie_1_phy_ldo.c),

	},

};



static struct gate_clk sata_phy_ldo = {

	.en_reg = SATA_PHY_LDO_EN,

	.en_mask = BIT(0),

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "sata_phy_ldo",

		.ops = &clk_ops_gate,

		CLK_INIT(sata_phy_ldo.c),

	},

};



static DEFINE_CLK_MEASURE(l2_m_clk);

static DEFINE_CLK_MEASURE(krait0_m_clk);

static DEFINE_CLK_MEASURE(krait1_m_clk);
@@ -6202,6 +6235,11 @@ static struct clk_lookup apq_clocks_8084[] = { 
	CLK_LOOKUP("",		pixel_clk_src_8084.c,              ""),

	CLK_LOOKUP("",		byte_mux_8084.c,                   ""),

	CLK_LOOKUP("",		byte_clk_src_8084.c,               ""),



	/* LDO */

	CLK_LOOKUP("",		pcie_0_phy_ldo.c,               ""),

	CLK_LOOKUP("",		pcie_1_phy_ldo.c,               ""),

	CLK_LOOKUP("",		sata_phy_ldo.c,               ""),

};



static struct pll_config_regs gpll4_regs __initdata = {