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Commit 12065ccb authored by Tianyi Gou's avatar Tianyi Gou
Browse files

msm: clock-8084: Add usb reset support 



USB needs to do some resets in the power up and down
sequence. Add the corresponding clocks to allow the driver
to use clock reset api to achieve this.

Change-Id: I9f3342ec51fb3f4314c4e4d056a95b8d27074088
Signed-off-by: default avatarTianyi Gou <tgou@codeaurora.org>
parent 45e6c452

arch/arm/mach-msm/clock-8084.c

+24 −0
Original line number Diff line number Diff line
@@ -3169,6 +3169,7 @@ static struct branch_clk gcc_ufs_tx_symbol_1_clk = { 


static struct branch_clk gcc_usb2a_phy_sleep_clk = {

	.cbcr_reg = USB2A_PHY_SLEEP_CBCR,

	.bcr_reg = USB2A_PHY_BCR,

	.has_sibling = 1,

	.base = &virt_bases[GCC_BASE],

	.c = {
@@ -3363,6 +3364,26 @@ static struct branch_clk gcc_usb_hsic_system_clk = { 
	},

};



static struct reset_clk gcc_usb30_phy_com_clk = {

	.reset_reg = USB30_PHY_COM_BCR,

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "gcc_usb30_phy_com_clk",

		.ops = &clk_ops_rst,

		CLK_INIT(gcc_usb30_phy_com_clk.c),

	},

};



static struct reset_clk gcc_usb3_phy_clk = {

	.reset_reg = USB3_PHY_BCR,

	.base = &virt_bases[GCC_BASE],

	.c = {

		.dbg_name = "gcc_usb3_phy_clk",

		.ops = &clk_ops_rst,

		CLK_INIT(gcc_usb3_phy_clk.c),

	},

};



static struct pll_vote_clk mmpll0_clk_src = {

	.en_reg = (void __iomem *)MMSS_PLL_VOTE_APCS,

	.en_mask = BIT(0),
@@ -5909,6 +5930,9 @@ static struct clk_lookup apq_clocks_8084[] = { 
	CLK_LOOKUP("system_clk", gcc_usb_hsic_system_clk.c,

			"f9c00000.qcom,xhci-msm-hsic"),



	CLK_LOOKUP("",	gcc_usb30_phy_com_clk.c,	""),

	CLK_LOOKUP("",	gcc_usb3_phy_clk.c,	""),



	/* PCIE clocks */

	CLK_LOOKUP("",	gcc_pcie_0_aux_clk.c,	""),

	CLK_LOOKUP("",	gcc_pcie_0_cfg_ahb_clk.c,	""),