Loading arch/arm/boot/dts/qcom/msm8909.dtsi +9 −5 Original line number Diff line number Diff line Loading @@ -267,7 +267,7 @@ qcom,clock-a7@0b011050 { compatible = "qcom,clock-a53-8916"; reg = <0x0b011050 0x8>, <0x0005c004 0x8>; <0x0005c00c 0x8>; reg-names = "rcg-base", "efuse"; qcom,safe-freq = < 400000000 >; cpu-vdd-supply = <&pm8909_s1_corner_ao>; Loading @@ -280,7 +280,11 @@ < 400000000 4>, < 800000000 5>, < 1305600000 7>; qcom,speed2-bin-v0 = < 0 0>, < 400000000 4>, < 800000000 5>, < 1094400000 7>; }; cpubw: qcom,cpubw { Loading @@ -302,9 +306,9 @@ target-dev = <&cpubw>; cpu-to-dev-map = < 400000 762>, < 998400 1525>, < 1094400 3051>, < 1190400 4066>; < 800000 1525>, < 998400 3051>, < 1094400 4066>; }; }; Loading Loading
arch/arm/boot/dts/qcom/msm8909.dtsi +9 −5 Original line number Diff line number Diff line Loading @@ -267,7 +267,7 @@ qcom,clock-a7@0b011050 { compatible = "qcom,clock-a53-8916"; reg = <0x0b011050 0x8>, <0x0005c004 0x8>; <0x0005c00c 0x8>; reg-names = "rcg-base", "efuse"; qcom,safe-freq = < 400000000 >; cpu-vdd-supply = <&pm8909_s1_corner_ao>; Loading @@ -280,7 +280,11 @@ < 400000000 4>, < 800000000 5>, < 1305600000 7>; qcom,speed2-bin-v0 = < 0 0>, < 400000000 4>, < 800000000 5>, < 1094400000 7>; }; cpubw: qcom,cpubw { Loading @@ -302,9 +306,9 @@ target-dev = <&cpubw>; cpu-to-dev-map = < 400000 762>, < 998400 1525>, < 1094400 3051>, < 1190400 4066>; < 800000 1525>, < 998400 3051>, < 1094400 4066>; }; }; Loading