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Commit bf92a32c authored by Taniya Das's avatar Taniya Das
Browse files

ARM: msm: dts: Add support for 1.1GHz 



Modify the efuse register offset and add new cpu frequency and DDR
bandwidth for the frequency.

Change-Id: I8cd137d1b2923a17721c4d649187781d3129e5a8
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent b67d397a

arch/arm/boot/dts/qcom/msm8909.dtsi

+9 −5
Original line number Diff line number Diff line
@@ -267,7 +267,7 @@ 
	qcom,clock-a7@0b011050 {

		compatible = "qcom,clock-a53-8916";

		reg = <0x0b011050 0x8>,

		      <0x0005c004 0x8>;

		      <0x0005c00c 0x8>;

		reg-names = "rcg-base", "efuse";

		qcom,safe-freq = < 400000000 >;

		cpu-vdd-supply = <&pm8909_s1_corner_ao>;
@@ -280,7 +280,11 @@ 
			<  400000000 4>,

			<  800000000 5>,

			< 1305600000 7>;



		qcom,speed2-bin-v0 =

			<          0 0>,

			<  400000000 4>,

			<  800000000 5>,

			< 1094400000 7>;

	};



	cpubw: qcom,cpubw {
@@ -302,9 +306,9 @@ 
			target-dev = <&cpubw>;

			cpu-to-dev-map =

				 <  400000  762>,

				 <  998400  1525>,

				 < 1094400  3051>,

				 < 1190400  4066>;

				 <  800000  1525>,

				 <  998400  3051>,

				 < 1094400  4066>;

		};

	};