Loading arch/arm/boot/dts/qcom/msm8994.dtsi +5 −5 Original line number Diff line number Diff line Loading @@ -2839,7 +2839,7 @@ qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <55 512 0 0>, <55 512 3936000 393600>; <55 512 393600 393600>; clock-names = "core_clk_src", "iface_clk", "bus_clk"; clocks = <&clock_rpm clk_qcrypto_ce2_clk>, <&clock_rpm clk_gcc_ce2_ahb_m_clk>, Loading @@ -2866,7 +2866,7 @@ qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <55 512 0 0>, <55 512 3936000 393600>; <55 512 393600 393600>; clock-names = "core_clk_src", "iface_clk", "bus_clk"; clocks = <&clock_rpm clk_qcrypto_ce3_clk>, <&clock_rpm clk_gcc_ce3_ahb_m_clk>, Loading @@ -2893,7 +2893,7 @@ qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <55 512 0 0>, <55 512 3936000 393600>; <55 512 393600 393600>; clock-names = "core_clk_src", "iface_clk", "bus_clk"; clocks = <&clock_rpm clk_qcrypto_ce2_clk>, <&clock_rpm clk_gcc_ce2_ahb_m_clk>, Loading @@ -2920,7 +2920,7 @@ qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <55 512 0 0>, <55 512 3936000 393600>; <55 512 393600 393600>; clock-names = "core_clk_src", "iface_clk", "bus_clk"; clocks = <&clock_rpm clk_qcrypto_ce3_clk>, <&clock_rpm clk_gcc_ce3_ahb_m_clk>, Loading @@ -2947,7 +2947,7 @@ qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <55 512 0 0>, <55 512 3936000 393600>; <55 512 393600 393600>; clock-names = "core_clk_src", "iface_clk", "bus_clk"; clocks = <&clock_rpm clk_qcedev_ce2_clk>, <&clock_rpm clk_gcc_ce2_ahb_m_clk>, Loading Loading
arch/arm/boot/dts/qcom/msm8994.dtsi +5 −5 Original line number Diff line number Diff line Loading @@ -2839,7 +2839,7 @@ qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <55 512 0 0>, <55 512 3936000 393600>; <55 512 393600 393600>; clock-names = "core_clk_src", "iface_clk", "bus_clk"; clocks = <&clock_rpm clk_qcrypto_ce2_clk>, <&clock_rpm clk_gcc_ce2_ahb_m_clk>, Loading @@ -2866,7 +2866,7 @@ qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <55 512 0 0>, <55 512 3936000 393600>; <55 512 393600 393600>; clock-names = "core_clk_src", "iface_clk", "bus_clk"; clocks = <&clock_rpm clk_qcrypto_ce3_clk>, <&clock_rpm clk_gcc_ce3_ahb_m_clk>, Loading @@ -2893,7 +2893,7 @@ qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <55 512 0 0>, <55 512 3936000 393600>; <55 512 393600 393600>; clock-names = "core_clk_src", "iface_clk", "bus_clk"; clocks = <&clock_rpm clk_qcrypto_ce2_clk>, <&clock_rpm clk_gcc_ce2_ahb_m_clk>, Loading @@ -2920,7 +2920,7 @@ qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <55 512 0 0>, <55 512 3936000 393600>; <55 512 393600 393600>; clock-names = "core_clk_src", "iface_clk", "bus_clk"; clocks = <&clock_rpm clk_qcrypto_ce3_clk>, <&clock_rpm clk_gcc_ce3_ahb_m_clk>, Loading @@ -2947,7 +2947,7 @@ qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <55 512 0 0>, <55 512 3936000 393600>; <55 512 393600 393600>; clock-names = "core_clk_src", "iface_clk", "bus_clk"; clocks = <&clock_rpm clk_qcedev_ce2_clk>, <&clock_rpm clk_gcc_ce2_ahb_m_clk>, Loading