Loading arch/arm/boot/dts/qcom/msm8936.dtsi +9 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,15 @@ }; &soc { timer { compatible = "arm,armv7-timer"; interrupts = <1 2 0xf008>, <1 3 0xf008>, <1 4 0xf008>, <1 1 0xf008>; clock-frequency = <19200000>; }; clock_cpu: qcom,cpu-clock-8936@b011050 { compatible = "qcom,cpu-clock-8936"; reg = <0xb011050 0x8>, Loading arch/arm/boot/dts/qcom/msm8939-common.dtsi +0 −9 Original line number Diff line number Diff line Loading @@ -120,15 +120,6 @@ reg = <0x4ab000 0x4>; }; timer { compatible = "arm,armv7-timer"; interrupts = <1 2 0xf08>, <1 3 0xf08>, <1 4 0xf08>, <1 1 0xf08>; clock-frequency = <19200000>; }; timer@b120000 { #address-cells = <1>; #size-cells = <1>; Loading arch/arm/boot/dts/qcom/msm8939.dtsi +9 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,15 @@ }; &soc { timer { compatible = "arm,armv7-timer"; interrupts = <1 2 0xff08>, <1 3 0xff08>, <1 4 0xff08>, <1 1 0xff08>; clock-frequency = <19200000>; }; clock_cpu: qcom,cpu-clock-8939@b111050 { compatible = "qcom,cpu-clock-8939"; reg = <0x0b111050 0x8>, Loading arch/arm/boot/dts/qcom/msm8994.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -313,10 +313,10 @@ timer { compatible = "arm,armv8-timer"; interrupts = <1 2 0xf08>, <1 3 0xf08>, <1 4 0xf08>, <1 1 0xf08>; interrupts = <1 2 0xff08>, <1 3 0xff08>, <1 4 0xff08>, <1 1 0xff08>; clock-frequency = <19200000>; }; Loading Loading
arch/arm/boot/dts/qcom/msm8936.dtsi +9 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,15 @@ }; &soc { timer { compatible = "arm,armv7-timer"; interrupts = <1 2 0xf008>, <1 3 0xf008>, <1 4 0xf008>, <1 1 0xf008>; clock-frequency = <19200000>; }; clock_cpu: qcom,cpu-clock-8936@b011050 { compatible = "qcom,cpu-clock-8936"; reg = <0xb011050 0x8>, Loading
arch/arm/boot/dts/qcom/msm8939-common.dtsi +0 −9 Original line number Diff line number Diff line Loading @@ -120,15 +120,6 @@ reg = <0x4ab000 0x4>; }; timer { compatible = "arm,armv7-timer"; interrupts = <1 2 0xf08>, <1 3 0xf08>, <1 4 0xf08>, <1 1 0xf08>; clock-frequency = <19200000>; }; timer@b120000 { #address-cells = <1>; #size-cells = <1>; Loading
arch/arm/boot/dts/qcom/msm8939.dtsi +9 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,15 @@ }; &soc { timer { compatible = "arm,armv7-timer"; interrupts = <1 2 0xff08>, <1 3 0xff08>, <1 4 0xff08>, <1 1 0xff08>; clock-frequency = <19200000>; }; clock_cpu: qcom,cpu-clock-8939@b111050 { compatible = "qcom,cpu-clock-8939"; reg = <0x0b111050 0x8>, Loading
arch/arm/boot/dts/qcom/msm8994.dtsi +4 −4 Original line number Diff line number Diff line Loading @@ -313,10 +313,10 @@ timer { compatible = "arm,armv8-timer"; interrupts = <1 2 0xf08>, <1 3 0xf08>, <1 4 0xf08>, <1 1 0xf08>; interrupts = <1 2 0xff08>, <1 3 0xff08>, <1 4 0xff08>, <1 1 0xff08>; clock-frequency = <19200000>; }; Loading