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Commit c62c2b8f authored by Srinivas Ramana's avatar Srinivas Ramana
Browse files

ARM: dts: msm: Fix arch timer interrupts cpu mask 



Fix the cpu mask for arch timer interrupts in
octacore msm chips.

Change-Id: Ic2f721714caf3aaeffa97e7dd1ac4408be3991bb
Signed-off-by: default avatarSrinivas Ramana <sramana@codeaurora.org>
parent 83dd8ec0

arch/arm/boot/dts/qcom/msm8936.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -27,6 +27,15 @@ 
};



&soc {

	timer {

		compatible = "arm,armv7-timer";

		interrupts = <1 2 0xf008>,

			     <1 3 0xf008>,

			     <1 4 0xf008>,

			     <1 1 0xf008>;

		clock-frequency = <19200000>;

	};



	clock_cpu: qcom,cpu-clock-8936@b011050 {

		compatible = "qcom,cpu-clock-8936";

		reg = <0xb011050 0x8>,

arch/arm/boot/dts/qcom/msm8939-common.dtsi

+0 −9
Original line number Diff line number Diff line
@@ -120,15 +120,6 @@ 
		reg = <0x4ab000 0x4>;

	};



	timer {

		compatible = "arm,armv7-timer";

		interrupts = <1 2 0xf08>,

			     <1 3 0xf08>,

			     <1 4 0xf08>,

			     <1 1 0xf08>;

		clock-frequency = <19200000>;

	};



	timer@b120000 {

		#address-cells = <1>;

		#size-cells = <1>;

arch/arm/boot/dts/qcom/msm8939.dtsi

+9 −0
Original line number Diff line number Diff line
@@ -27,6 +27,15 @@ 
};



&soc {

	timer {

		compatible = "arm,armv7-timer";

		interrupts = <1 2 0xff08>,

			     <1 3 0xff08>,

			     <1 4 0xff08>,

			     <1 1 0xff08>;

		clock-frequency = <19200000>;

	};



	clock_cpu: qcom,cpu-clock-8939@b111050 {

		compatible = "qcom,cpu-clock-8939";

		reg = <0x0b111050 0x8>,

arch/arm/boot/dts/qcom/msm8994.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -313,10 +313,10 @@ 


	timer {

		compatible = "arm,armv8-timer";

		interrupts = <1 2 0xf08>,

			     <1 3 0xf08>,

			     <1 4 0xf08>,

			     <1 1 0xf08>;

		interrupts = <1 2 0xff08>,

			     <1 3 0xff08>,

			     <1 4 0xff08>,

			     <1 1 0xff08>;

		clock-frequency = <19200000>;

	};