Merge "ARM: dts: msm: add ref clock control register address for MSM8994"

	ufsphy1: ufsphy@fc597000 {

			compatible = "qcom,ufs-phy-qmp-20nm";

			reg = <0xfc597000 0xda8>;

			reg-names = "phy_mem";

			reg = <0xfc597000 0xda8>, <0xfd512074 0x4>;

			reg-names = "phy_mem", "dev_ref_clk_ctrl_mem";

			#phy-cells = <0>;

			vdda-phy-supply = <&pm8994_l28>;

			vdda-pll-supply = <&pm8994_l12>;