Loading arch/arm64/include/asm/edac.h +0 −2 Original line number Diff line number Diff line Loading @@ -14,10 +14,8 @@ #define ASM_EDAC_H #ifdef CONFIG_EDAC_CORTEX_ARM64 void arm64_erp_local_dbe_handler(void); void arm64_check_cache_ecc(void *info); #else static inline void arm64_erp_local_dbe_handler(void) { } static inline void arm64_check_cache_ecc(void *info) { } #endif Loading arch/arm64/kernel/traps.c +1 −1 Original line number Diff line number Diff line Loading @@ -426,7 +426,7 @@ asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr) if (esr >> ESR_EL1_EC_SHIFT == ESR_EL1_EC_SERROR) { pr_crit("System error detected. ESR.ISS = %08x\n", esr & 0xffffff); arm64_erp_local_dbe_handler(); arm64_check_cache_ecc(NULL); } arm64_notify_die("Oops - bad mode", regs, &info, 0); Loading arch/arm64/mm/fault.c +1 −1 Original line number Diff line number Diff line Loading @@ -370,7 +370,7 @@ static int __kprobes do_translation_fault(unsigned long addr, */ static int do_bad(unsigned long addr, unsigned int esr, struct pt_regs *regs) { arm64_erp_local_dbe_handler(); arm64_check_cache_ecc(NULL); return 1; } Loading drivers/edac/cortex_arm64_edac.c +17 −32 Original line number Diff line number Diff line Loading @@ -125,7 +125,7 @@ struct erp_drvdata { int apply_cti_pmu_wa; }; static struct erp_drvdata *abort_handler_drvdata, *panic_handler_drvdata; static struct erp_drvdata *panic_handler_drvdata; struct erp_local_data { struct erp_drvdata *drv; Loading Loading @@ -235,14 +235,14 @@ static void ca53_parse_cpumerrsr(struct erp_local_data *ed) if (!A53_CPUMERRSR_VALID(cpumerrsr)) return; if (A53_CPUMERRSR_FATAL(cpumerrsr)) ed->err = DBE; edac_printk(KERN_CRIT, EDAC_CPU, "Cortex A53 CPU%d L1 %s Error detected\n", smp_processor_id(), err_name[ed->err]); ca53_ca57_print_error_state_regs(); if (A53_CPUMERRSR_FATAL(cpumerrsr)) { if (ed->err == DBE) edac_printk(KERN_CRIT, EDAC_CPU, "Fatal error\n"); ed->err = DBE; } cpuid = A53_CPUMERRSR_CPUID(cpumerrsr); Loading Loading @@ -306,13 +306,14 @@ static void ca53_parse_l2merrsr(struct erp_local_data *ed) if (!A53_L2MERRSR_VALID(l2merrsr)) return; if (A53_L2MERRSR_FATAL(l2merrsr)) ed->err = DBE; edac_printk(KERN_CRIT, EDAC_CPU, "CortexA53 L2 %s Error detected\n", err_name[ed->err]); ca53_ca57_print_error_state_regs(); if (A53_L2MERRSR_FATAL(l2merrsr)) { if (ed->err == DBE) edac_printk(KERN_CRIT, EDAC_CPU, "Fatal error\n"); ed->err = DBE; } cpuid = A53_L2MERRSR_CPUID(l2merrsr); Loading Loading @@ -362,13 +363,14 @@ static void ca57_parse_cpumerrsr(struct erp_local_data *ed) if (!A57_CPUMERRSR_VALID(cpumerrsr)) return; if (A57_CPUMERRSR_FATAL(cpumerrsr)) ed->err = DBE; edac_printk(KERN_CRIT, EDAC_CPU, "Cortex A57 CPU%d L1 %s Error detected\n", smp_processor_id(), err_name[ed->err]); ca53_ca57_print_error_state_regs(); if (A57_CPUMERRSR_FATAL(cpumerrsr)) { if (ed->err == DBE) edac_printk(KERN_CRIT, EDAC_CPU, "Fatal error\n"); ed->err = DBE; } bank = A57_CPUMERRSR_BANK(cpumerrsr); Loading Loading @@ -426,13 +428,14 @@ static void ca57_parse_l2merrsr(struct erp_local_data *ed) if (!A57_L2MERRSR_VALID(l2merrsr)) return; if (A57_L2MERRSR_FATAL(l2merrsr)) ed->err = DBE; edac_printk(KERN_CRIT, EDAC_CPU, "CortexA57 L2 %s Error detected\n", err_name[ed->err]); ca53_ca57_print_error_state_regs(); if (A57_L2MERRSR_FATAL(l2merrsr)) { if (ed->err == DBE) edac_printk(KERN_CRIT, EDAC_CPU, "Fatal error\n"); ed->err = DBE; } cpuid = A57_L2MERRSR_CPUID(l2merrsr); Loading Loading @@ -607,16 +610,6 @@ static irqreturn_t arm64_cci_handler(int irq, void *drvdata) return IRQ_HANDLED; } void arm64_erp_local_dbe_handler(void) { if (abort_handler_drvdata) { struct erp_local_data errdata; errdata.err = DBE; errdata.drv = abort_handler_drvdata; arm64_erp_local_handler(&errdata); } } static inline u32 armv8pmu_pmcr_read(void) { u32 val; Loading Loading @@ -993,14 +986,6 @@ out_irq: goto out_dev; } /* * abort_handler_drvdata points to erp_drvdata structure used for * reporting information on double-bit errors. There should only ever * be one. * */ WARN_ON(abort_handler_drvdata); abort_handler_drvdata = drv; panic_handler_drvdata = drv; return 0; Loading Loading
arch/arm64/include/asm/edac.h +0 −2 Original line number Diff line number Diff line Loading @@ -14,10 +14,8 @@ #define ASM_EDAC_H #ifdef CONFIG_EDAC_CORTEX_ARM64 void arm64_erp_local_dbe_handler(void); void arm64_check_cache_ecc(void *info); #else static inline void arm64_erp_local_dbe_handler(void) { } static inline void arm64_check_cache_ecc(void *info) { } #endif Loading
arch/arm64/kernel/traps.c +1 −1 Original line number Diff line number Diff line Loading @@ -426,7 +426,7 @@ asmlinkage void bad_mode(struct pt_regs *regs, int reason, unsigned int esr) if (esr >> ESR_EL1_EC_SHIFT == ESR_EL1_EC_SERROR) { pr_crit("System error detected. ESR.ISS = %08x\n", esr & 0xffffff); arm64_erp_local_dbe_handler(); arm64_check_cache_ecc(NULL); } arm64_notify_die("Oops - bad mode", regs, &info, 0); Loading
arch/arm64/mm/fault.c +1 −1 Original line number Diff line number Diff line Loading @@ -370,7 +370,7 @@ static int __kprobes do_translation_fault(unsigned long addr, */ static int do_bad(unsigned long addr, unsigned int esr, struct pt_regs *regs) { arm64_erp_local_dbe_handler(); arm64_check_cache_ecc(NULL); return 1; } Loading
drivers/edac/cortex_arm64_edac.c +17 −32 Original line number Diff line number Diff line Loading @@ -125,7 +125,7 @@ struct erp_drvdata { int apply_cti_pmu_wa; }; static struct erp_drvdata *abort_handler_drvdata, *panic_handler_drvdata; static struct erp_drvdata *panic_handler_drvdata; struct erp_local_data { struct erp_drvdata *drv; Loading Loading @@ -235,14 +235,14 @@ static void ca53_parse_cpumerrsr(struct erp_local_data *ed) if (!A53_CPUMERRSR_VALID(cpumerrsr)) return; if (A53_CPUMERRSR_FATAL(cpumerrsr)) ed->err = DBE; edac_printk(KERN_CRIT, EDAC_CPU, "Cortex A53 CPU%d L1 %s Error detected\n", smp_processor_id(), err_name[ed->err]); ca53_ca57_print_error_state_regs(); if (A53_CPUMERRSR_FATAL(cpumerrsr)) { if (ed->err == DBE) edac_printk(KERN_CRIT, EDAC_CPU, "Fatal error\n"); ed->err = DBE; } cpuid = A53_CPUMERRSR_CPUID(cpumerrsr); Loading Loading @@ -306,13 +306,14 @@ static void ca53_parse_l2merrsr(struct erp_local_data *ed) if (!A53_L2MERRSR_VALID(l2merrsr)) return; if (A53_L2MERRSR_FATAL(l2merrsr)) ed->err = DBE; edac_printk(KERN_CRIT, EDAC_CPU, "CortexA53 L2 %s Error detected\n", err_name[ed->err]); ca53_ca57_print_error_state_regs(); if (A53_L2MERRSR_FATAL(l2merrsr)) { if (ed->err == DBE) edac_printk(KERN_CRIT, EDAC_CPU, "Fatal error\n"); ed->err = DBE; } cpuid = A53_L2MERRSR_CPUID(l2merrsr); Loading Loading @@ -362,13 +363,14 @@ static void ca57_parse_cpumerrsr(struct erp_local_data *ed) if (!A57_CPUMERRSR_VALID(cpumerrsr)) return; if (A57_CPUMERRSR_FATAL(cpumerrsr)) ed->err = DBE; edac_printk(KERN_CRIT, EDAC_CPU, "Cortex A57 CPU%d L1 %s Error detected\n", smp_processor_id(), err_name[ed->err]); ca53_ca57_print_error_state_regs(); if (A57_CPUMERRSR_FATAL(cpumerrsr)) { if (ed->err == DBE) edac_printk(KERN_CRIT, EDAC_CPU, "Fatal error\n"); ed->err = DBE; } bank = A57_CPUMERRSR_BANK(cpumerrsr); Loading Loading @@ -426,13 +428,14 @@ static void ca57_parse_l2merrsr(struct erp_local_data *ed) if (!A57_L2MERRSR_VALID(l2merrsr)) return; if (A57_L2MERRSR_FATAL(l2merrsr)) ed->err = DBE; edac_printk(KERN_CRIT, EDAC_CPU, "CortexA57 L2 %s Error detected\n", err_name[ed->err]); ca53_ca57_print_error_state_regs(); if (A57_L2MERRSR_FATAL(l2merrsr)) { if (ed->err == DBE) edac_printk(KERN_CRIT, EDAC_CPU, "Fatal error\n"); ed->err = DBE; } cpuid = A57_L2MERRSR_CPUID(l2merrsr); Loading Loading @@ -607,16 +610,6 @@ static irqreturn_t arm64_cci_handler(int irq, void *drvdata) return IRQ_HANDLED; } void arm64_erp_local_dbe_handler(void) { if (abort_handler_drvdata) { struct erp_local_data errdata; errdata.err = DBE; errdata.drv = abort_handler_drvdata; arm64_erp_local_handler(&errdata); } } static inline u32 armv8pmu_pmcr_read(void) { u32 val; Loading Loading @@ -993,14 +986,6 @@ out_irq: goto out_dev; } /* * abort_handler_drvdata points to erp_drvdata structure used for * reporting information on double-bit errors. There should only ever * be one. * */ WARN_ON(abort_handler_drvdata); abort_handler_drvdata = drv; panic_handler_drvdata = drv; return 0; Loading