Loading drivers/power/qpnp-fg.c +10 −0 Original line number Diff line number Diff line Loading @@ -2633,6 +2633,7 @@ static int soc_to_setpoint(int soc) #define THERMAL_COEFF_ADDR 0x444 #define THERMAL_COEFF_OFFSET 0x2 #define I_TERM_QUAL_BIT BIT(1) #define PATCH_NEG_CURRENT_BIT BIT(3) static int fg_hw_init(struct fg_chip *chip) { u8 resume_soc; Loading @@ -2647,6 +2648,15 @@ static int fg_hw_init(struct fg_chip *chip) return rc; } rc = fg_mem_masked_write(chip, EXTERNAL_SENSE_SELECT, PATCH_NEG_CURRENT_BIT, PATCH_NEG_CURRENT_BIT, EXTERNAL_SENSE_OFFSET); if (rc) { pr_err("failed to write patch current bit rc=%d\n", rc); return rc; } resume_soc = settings[FG_MEM_RESUME_SOC].value; if (resume_soc > 0) { resume_soc = resume_soc * 255 / 100; Loading Loading
drivers/power/qpnp-fg.c +10 −0 Original line number Diff line number Diff line Loading @@ -2633,6 +2633,7 @@ static int soc_to_setpoint(int soc) #define THERMAL_COEFF_ADDR 0x444 #define THERMAL_COEFF_OFFSET 0x2 #define I_TERM_QUAL_BIT BIT(1) #define PATCH_NEG_CURRENT_BIT BIT(3) static int fg_hw_init(struct fg_chip *chip) { u8 resume_soc; Loading @@ -2647,6 +2648,15 @@ static int fg_hw_init(struct fg_chip *chip) return rc; } rc = fg_mem_masked_write(chip, EXTERNAL_SENSE_SELECT, PATCH_NEG_CURRENT_BIT, PATCH_NEG_CURRENT_BIT, EXTERNAL_SENSE_OFFSET); if (rc) { pr_err("failed to write patch current bit rc=%d\n", rc); return rc; } resume_soc = settings[FG_MEM_RESUME_SOC].value; if (resume_soc > 0) { resume_soc = resume_soc * 255 / 100; Loading