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Commit f1e8e381 authored by Sricharan R's avatar Sricharan R Committed by Rob Herring
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ARM: dts: doc: Document missing binding for omap5-mpu



The binding and support for omap5-mpu which has a cortex-a15
smp core, gic and integrated L2 cache has been existing for sometime.
So Documenting the missing binding here.

Cc: Benoit Cousson <bcousson@baylibre.com>
Signed-off-by: default avatarSricharan R <r.sricharan@ti.com>
Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
parent f04bda90
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