Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4ca2c040 authored by Thomas Petazzoni's avatar Thomas Petazzoni Committed by Jason Cooper
Browse files

ARM: orion5x: Move to ID based window creation 



With the introduction of the ID based MBus API, it's better
to switch to use it instead of the current name based scheme.

This will allow to deprecate the name based API, once every
user is removed.

Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: default avatarAndrew Lunn <andrew@lunn.ch>
Tested-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent c5d0ecc9

arch/arm/mach-orion5x/common.c

+20 −16
Original line number Original line Diff line number Diff line
@@ -174,7 +174,9 @@ void __init orion5x_xor_init(void) 
 ****************************************************************************/

 ****************************************************************************/

static void __init orion5x_crypto_init(void)

static void __init orion5x_crypto_init(void)

{

{

	mvebu_mbus_add_window("sram", ORION5X_SRAM_PHYS_BASE,

	mvebu_mbus_add_window_by_id(ORION_MBUS_SRAM_TARGET,

				    ORION_MBUS_SRAM_ATTR,

				    ORION5X_SRAM_PHYS_BASE,

				    ORION5X_SRAM_SIZE);

				    ORION5X_SRAM_SIZE);

	orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,

	orion_crypto_init(ORION5X_CRYPTO_PHYS_BASE, ORION5X_SRAM_PHYS_BASE,

			  SZ_8K, IRQ_ORION5X_CESA);

			  SZ_8K, IRQ_ORION5X_CESA);
@@ -222,22 +224,24 @@ void orion5x_setup_wins(void) 
	 * The PCIe windows will no longer be statically allocated

	 * The PCIe windows will no longer be statically allocated

	 * here once Orion5x is migrated to the pci-mvebu driver.

	 * here once Orion5x is migrated to the pci-mvebu driver.

	 */

	 */

	mvebu_mbus_add_window_remap_flags("pcie0.0", ORION5X_PCIE_IO_PHYS_BASE,

	mvebu_mbus_add_window_remap_by_id(ORION_MBUS_PCIE_IO_TARGET,

					  ORION_MBUS_PCIE_IO_ATTR,

					  ORION5X_PCIE_IO_PHYS_BASE,

					  ORION5X_PCIE_IO_SIZE,

					  ORION5X_PCIE_IO_SIZE,

					  ORION5X_PCIE_IO_BUS_BASE,

					  ORION5X_PCIE_IO_BUS_BASE);

					  MVEBU_MBUS_PCI_IO);

	mvebu_mbus_add_window_by_id(ORION_MBUS_PCIE_MEM_TARGET,

	mvebu_mbus_add_window_remap_flags("pcie0.0", ORION5X_PCIE_MEM_PHYS_BASE,

				    ORION_MBUS_PCIE_MEM_ATTR,

					  ORION5X_PCIE_MEM_SIZE,

				    ORION5X_PCIE_MEM_PHYS_BASE,

					  MVEBU_MBUS_NO_REMAP,

				    ORION5X_PCIE_MEM_SIZE);

					  MVEBU_MBUS_PCI_MEM);

	mvebu_mbus_add_window_remap_by_id(ORION_MBUS_PCI_IO_TARGET,

	mvebu_mbus_add_window_remap_flags("pci0.0", ORION5X_PCI_IO_PHYS_BASE,

					  ORION_MBUS_PCI_IO_ATTR,

					  ORION5X_PCI_IO_PHYS_BASE,

					  ORION5X_PCI_IO_SIZE,

					  ORION5X_PCI_IO_SIZE,

					  ORION5X_PCI_IO_BUS_BASE,

					  ORION5X_PCI_IO_BUS_BASE);

					  MVEBU_MBUS_PCI_IO);

	mvebu_mbus_add_window_by_id(ORION_MBUS_PCI_MEM_TARGET,

	mvebu_mbus_add_window_remap_flags("pci0.0", ORION5X_PCI_MEM_PHYS_BASE,

				    ORION_MBUS_PCI_MEM_ATTR,

					  ORION5X_PCI_MEM_SIZE,

				    ORION5X_PCI_MEM_PHYS_BASE,

					  MVEBU_MBUS_NO_REMAP,

				    ORION5X_PCI_MEM_SIZE);

					  MVEBU_MBUS_PCI_MEM);

}

}





int orion5x_tclk;

int orion5x_tclk;

arch/arm/mach-orion5x/common.h

+17 −0
Original line number Original line Diff line number Diff line
@@ -7,6 +7,23 @@ struct dsa_platform_data; 
struct mv643xx_eth_platform_data;

struct mv643xx_eth_platform_data;

struct mv_sata_platform_data;

struct mv_sata_platform_data;





#define ORION_MBUS_PCIE_MEM_TARGET    0x04

#define ORION_MBUS_PCIE_MEM_ATTR      0x59

#define ORION_MBUS_PCIE_IO_TARGET     0x04

#define ORION_MBUS_PCIE_IO_ATTR       0x51

#define ORION_MBUS_PCIE_WA_TARGET     0x04

#define ORION_MBUS_PCIE_WA_ATTR       0x79

#define ORION_MBUS_PCI_MEM_TARGET     0x03

#define ORION_MBUS_PCI_MEM_ATTR       0x59

#define ORION_MBUS_PCI_IO_TARGET      0x03

#define ORION_MBUS_PCI_IO_ATTR        0x51

#define ORION_MBUS_DEVBUS_BOOT_TARGET 0x01

#define ORION_MBUS_DEVBUS_BOOT_ATTR   0x0f

#define ORION_MBUS_DEVBUS_TARGET(cs)  0x01

#define ORION_MBUS_DEVBUS_ATTR(cs)    (~(1 << cs))

#define ORION_MBUS_SRAM_TARGET        0x00

#define ORION_MBUS_SRAM_ATTR          0x00



/*

/*

 * Basic Orion init functions used early by machine-setup.

 * Basic Orion init functions used early by machine-setup.

 */

 */

arch/arm/mach-orion5x/d2net-setup.c

+4 −2
Original line number Original line Diff line number Diff line
@@ -317,7 +317,9 @@ static void __init d2net_init(void) 
	d2net_sata_power_init();

	d2net_sata_power_init();

	orion5x_sata_init(&d2net_sata_data);

	orion5x_sata_init(&d2net_sata_data);





	mvebu_mbus_add_window("devbus-boot", D2NET_NOR_BOOT_BASE,

	mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,

				    ORION_MBUS_DEVBUS_BOOT_ATTR,

				    D2NET_NOR_BOOT_BASE,

				    D2NET_NOR_BOOT_SIZE);

				    D2NET_NOR_BOOT_SIZE);

	platform_device_register(&d2net_nor_flash);

	platform_device_register(&d2net_nor_flash);

arch/arm/mach-orion5x/db88f5281-setup.c

+16 −8
Original line number Original line Diff line number Diff line
@@ -340,18 +340,26 @@ static void __init db88f5281_init(void) 
	orion5x_uart0_init();

	orion5x_uart0_init();

	orion5x_uart1_init();

	orion5x_uart1_init();





	mvebu_mbus_add_window("devbus-boot", DB88F5281_NOR_BOOT_BASE,

	mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,

				    ORION_MBUS_DEVBUS_BOOT_ATTR,

				    DB88F5281_NOR_BOOT_BASE,

				    DB88F5281_NOR_BOOT_SIZE);

				    DB88F5281_NOR_BOOT_SIZE);

	platform_device_register(&db88f5281_boot_flash);

	platform_device_register(&db88f5281_boot_flash);





	mvebu_mbus_add_window("devbus-cs0", DB88F5281_7SEG_BASE,

	mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_TARGET(0),

				    ORION_MBUS_DEVBUS_ATTR(0),

				    DB88F5281_7SEG_BASE,

				    DB88F5281_7SEG_SIZE);

				    DB88F5281_7SEG_SIZE);





	mvebu_mbus_add_window("devbus-cs1", DB88F5281_NOR_BASE,

	mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_TARGET(1),

				    ORION_MBUS_DEVBUS_ATTR(1),

				    DB88F5281_NOR_BASE,

				    DB88F5281_NOR_SIZE);

				    DB88F5281_NOR_SIZE);

	platform_device_register(&db88f5281_nor_flash);

	platform_device_register(&db88f5281_nor_flash);





	mvebu_mbus_add_window("devbus-cs2", DB88F5281_NAND_BASE,

	mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_TARGET(2),

				    ORION_MBUS_DEVBUS_ATTR(2),

				    DB88F5281_NAND_BASE,

				    DB88F5281_NAND_SIZE);

				    DB88F5281_NAND_SIZE);

	platform_device_register(&db88f5281_nand_flash);

	platform_device_register(&db88f5281_nand_flash);

arch/arm/mach-orion5x/dns323-setup.c

+4 −2
Original line number Original line Diff line number Diff line
@@ -611,7 +611,9 @@ static void __init dns323_init(void) 
	/* setup flash mapping

	/* setup flash mapping

	 * CS3 holds a 8 MB Spansion S29GL064M90TFIR4

	 * CS3 holds a 8 MB Spansion S29GL064M90TFIR4

	 */

	 */

	mvebu_mbus_add_window("devbus-boot", DNS323_NOR_BOOT_BASE,

	mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,

				    ORION_MBUS_DEVBUS_BOOT_ATTR,

				    DNS323_NOR_BOOT_BASE,

				    DNS323_NOR_BOOT_SIZE);

				    DNS323_NOR_BOOT_SIZE);

	platform_device_register(&dns323_nor_flash);

	platform_device_register(&dns323_nor_flash);