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Commit 081c80e8 authored by Philipp Zabel's avatar Philipp Zabel
Browse files

drm/imx: dw_hdmi-imx: add mode_valid callback prune unsupported modes 



This patch limits the pixel clock to 13.4 MHz - 266 MHz for i.MX6Q
and 13.5 MHz - 270 MHz for i.MX6DL, which is the range documented
in the HDMI Transmitter chapter of the respective reference manuals.

Without this patch, when connected to a monitor capable of 2160p60
modes, dw_hdmi will happily report this mode and the IPU code will
cause a division by zero in ipu_di_config_clock when trying to figure
out how to divide the 264 MHz HSP clock down to ~600 MHz.

Signed-off-by: default avatarPhilipp Zabel <p.zabel@pengutronix.de>
parent 89ce4b0f

drivers/gpu/drm/imx/dw_hdmi-imx.c

+28 −4
Original line number Diff line number Diff line
@@ -136,11 +136,34 @@ static struct drm_encoder_funcs dw_hdmi_imx_encoder_funcs = { 
	.destroy = drm_encoder_cleanup,

};



static enum drm_mode_status imx6q_hdmi_mode_valid(struct drm_connector *con,

						  struct drm_display_mode *mode)

{

	if (mode->clock < 13500)

		return MODE_CLOCK_LOW;

	if (mode->clock > 266000)

		return MODE_CLOCK_HIGH;



	return MODE_OK;

}



static enum drm_mode_status imx6dl_hdmi_mode_valid(struct drm_connector *con,

						   struct drm_display_mode *mode)

{

	if (mode->clock < 13500)

		return MODE_CLOCK_LOW;

	if (mode->clock > 270000)

		return MODE_CLOCK_HIGH;



	return MODE_OK;

}



static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {

	.mpll_cfg   = imx_mpll_cfg,

	.cur_ctr    = imx_cur_ctr,

	.sym_term   = imx_sym_term,

	.dev_type   = IMX6Q_HDMI,

	.mode_valid = imx6q_hdmi_mode_valid,

};



static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
@@ -148,6 +171,7 @@ static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = { 
	.cur_ctr  = imx_cur_ctr,

	.sym_term = imx_sym_term,

	.dev_type = IMX6DL_HDMI,

	.mode_valid = imx6dl_hdmi_mode_valid,

};



static const struct of_device_id dw_hdmi_imx_dt_ids[] = {