Commit 89ce4b0f authored Jan 08, 2015 by Philipp Zabel

gpu: ipu-v3: do not divide by zero if the pixel clock is too large



Even if an unsupported mode with a pixel clock larger than two times the
264 MHz IPU HSP clock is set, don't divide by zero.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

parent c517d838

drivers/gpu/ipu-v3/ipu-di.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -459,6 +459,8 @@ static void ipu_di_config_clock(struct ipu_di *di,

		clkrate = clk_get_rate(di->clk_ipu);
		div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock);
		if (div == 0)
		div = 1;
		rate = clkrate / div;

		error = rate / (sig->mode.pixelclock / 1000);