[IA64] Kernel parameter for max number of concurrent global TLB purges (a6c75b86) · Commits · e / devices / android_kernel_samsung_exynos5433

Documentation/kernel-parameters.txt

+4 −0

Original line number	Original line	Diff line number	Diff line
	@@ -1335,6 +1335,10 @@ and is between 256 and 4096 characters. It is defined in the file

	nowb [ARM]		nowb [ARM]

			nptcg= [IA64] Override max number of concurrent global TLB
			purges which is reported from either PAL_VM_SUMMARY or
			SAL PALO.

	numa_zonelist_order= [KNL, BOOT] Select zonelist order for NUMA.		numa_zonelist_order= [KNL, BOOT] Select zonelist order for NUMA.
	one of ['zone', 'node', 'default'] can be specified		one of ['zone', 'node', 'default'] can be specified
	This can be set from sysctl after boot.		This can be set from sysctl after boot.

arch/ia64/kernel/efi.c

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -436,7 +436,7 @@ static void __init handle_palo(unsigned long palo_phys)
	return;		return;
	}		}

	setup_ptcg_sem(palo->max_tlb_purges, 1);		setup_ptcg_sem(palo->max_tlb_purges, NPTCG_FROM_PALO);
	}		}

	void		void

arch/ia64/kernel/setup.c

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -949,7 +949,7 @@ cpu_init (void)
	/* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */		/* set ia64_ctx.max_rid to the maximum RID that is supported by all CPUs: */
	if (ia64_pal_vm_summary(NULL, &vmi) == 0) {		if (ia64_pal_vm_summary(NULL, &vmi) == 0) {
	max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1;		max_ctx = (1U << (vmi.pal_vm_info_2_s.rid_size - 3)) - 1;
	setup_ptcg_sem(vmi.pal_vm_info_2_s.max_purges, 0);		setup_ptcg_sem(vmi.pal_vm_info_2_s.max_purges, NPTCG_FROM_PAL);
	} else {		} else {
	printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n");		printk(KERN_WARNING "cpu_init: PAL VM summary failed, assuming 18 RID bits\n");
	max_ctx = (1U << 15) - 1; /* use architected minimum */		max_ctx = (1U << 15) - 1; /* use architected minimum */

arch/ia64/mm/tlb.c

+41 −5

Original line number	Original line	Diff line number	Diff line
	@@ -119,6 +119,27 @@ static u16 nptcg = 1;
	static int need_ptcg_sem = 1;		static int need_ptcg_sem = 1;
	static int toolatetochangeptcgsem = 0;		static int toolatetochangeptcgsem = 0;

			/*
			* Kernel parameter "nptcg=" overrides max number of concurrent global TLB
			* purges which is reported from either PAL or SAL PALO.
			*
			* We don't have sanity checking for nptcg value. It's the user's responsibility
			* for valid nptcg value on the platform. Otherwise, kernel may hang in some
			* cases.
			*/
			static int __init
			set_nptcg(char *str)
			{
			int value = 0;

			get_option(&str, &value);
			setup_ptcg_sem(value, NPTCG_FROM_KERNEL_PARAMETER);

			return 1;
			}

			__setup("nptcg=", set_nptcg);

	/*		/*
	* Maximum number of simultaneous ptc.g purges in the system can		* Maximum number of simultaneous ptc.g purges in the system can
	* be defined by PAL_VM_SUMMARY (in which case we should take		* be defined by PAL_VM_SUMMARY (in which case we should take
	@@ -126,13 +147,18 @@ static int toolatetochangeptcgsem = 0;
	* override table (in which case we should ignore the value from		* override table (in which case we should ignore the value from
	* PAL_VM_SUMMARY).		* PAL_VM_SUMMARY).
	*		*
			* Kernel parameter "nptcg=" overrides maximum number of simultanesous ptc.g
			* purges defined in either PAL_VM_SUMMARY or PAL override table. In this case,
			* we should ignore the value from either PAL_VM_SUMMARY or PAL override table.
			*
	* Complicating the logic here is the fact that num_possible_cpus()		* Complicating the logic here is the fact that num_possible_cpus()
	* isn't fully setup until we start bringing cpus online.		* isn't fully setup until we start bringing cpus online.
	*/		*/
	void		void
	setup_ptcg_sem(int max_purges, int from_palo)		setup_ptcg_sem(int max_purges, int nptcg_from)
	{		{
	static int have_palo;		static int kp_override;
			static int palo_override;
	static int firstcpu = 1;		static int firstcpu = 1;

	if (toolatetochangeptcgsem) {		if (toolatetochangeptcgsem) {
	@@ -140,8 +166,18 @@ setup_ptcg_sem(int max_purges, int from_palo)
	return;		return;
	}		}

	if (from_palo) {		if (nptcg_from == NPTCG_FROM_KERNEL_PARAMETER) {
	have_palo = 1;		kp_override = 1;
			nptcg = max_purges;
			goto resetsema;
			}
			if (kp_override) {
			need_ptcg_sem = num_possible_cpus() > nptcg;
			return;
			}

			if (nptcg_from == NPTCG_FROM_PALO) {
			palo_override = 1;

	/* In PALO max_purges == 0 really means it! */		/* In PALO max_purges == 0 really means it! */
	if (max_purges == 0)		if (max_purges == 0)
	@@ -153,7 +189,7 @@ setup_ptcg_sem(int max_purges, int from_palo)
	}		}
	goto resetsema;		goto resetsema;
	}		}
	if (have_palo) {		if (palo_override) {
	if (nptcg != PALO_MAX_TLB_PURGES)		if (nptcg != PALO_MAX_TLB_PURGES)
	need_ptcg_sem = (num_possible_cpus() > nptcg);		need_ptcg_sem = (num_possible_cpus() > nptcg);
	return;		return;

include/asm-ia64/sal.h

+4 −0

Original line number	Original line	Diff line number	Diff line
	@@ -896,6 +896,10 @@ struct palo_table {
	u8 reserved2[6];		u8 reserved2[6];
	};		};

			#define NPTCG_FROM_PAL 0
			#define NPTCG_FROM_PALO 1
			#define NPTCG_FROM_KERNEL_PARAMETER 2

	#endif /* __ASSEMBLY__ */		#endif /* __ASSEMBLY__ */

	#endif /* _ASM_IA64_SAL_H */		#endif /* _ASM_IA64_SAL_H */