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Commit ff2e27ae authored by Russell King's avatar Russell King
Browse files

ARM: GIC: consolidate gic_cpu_base_addr to common GIC code 



Every architecture using the GIC has a gic_cpu_base_addr pointer for
GIC 0 for their entry assembly code to use to decode the cause of the
current interrupt.  Move this into the common GIC code.

Reviewed-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Tested-by: default avatarAbhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 38489533

arch/arm/common/gic.c

+5 −0
Original line number Diff line number Diff line
@@ -35,6 +35,9 @@ 


static DEFINE_SPINLOCK(irq_controller_lock);



/* Address of GIC 0 CPU interface */

void __iomem *gic_cpu_base_addr;



struct gic_chip_data {

	unsigned int irq_offset;

	void __iomem *dist_base;
@@ -317,6 +320,8 @@ static void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) 
void __init gic_init(unsigned int gic_nr, unsigned int irq_start,

	void __iomem *dist_base, void __iomem *cpu_base)

{

	if (gic_nr == 0)

		gic_cpu_base_addr = cpu_base;

	gic_dist_init(gic_nr, dist_base, irq_start);

	gic_cpu_init(gic_nr, cpu_base);

}

arch/arm/include/asm/hardware/gic.h

+2 −0
Original line number Diff line number Diff line
@@ -33,6 +33,8 @@ 
#define GIC_DIST_SOFTINT		0xf00



#ifndef __ASSEMBLY__

extern void __iomem *gic_cpu_base_addr;



void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *);

void gic_secondary_init(unsigned int);

void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);

arch/arm/mach-cns3xxx/core.c

+1 −4
Original line number Diff line number Diff line
@@ -69,13 +69,10 @@ void __init cns3xxx_map_io(void) 
}



/* used by entry-macro.S */

void __iomem *gic_cpu_base_addr;



void __init cns3xxx_init_irq(void)

{

	gic_cpu_base_addr = __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT);

	gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),

		gic_cpu_base_addr);

		 __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT));

}



void cns3xxx_power_off(void)

arch/arm/mach-cns3xxx/core.h

+0 −1
Original line number Diff line number Diff line
@@ -11,7 +11,6 @@ 
#ifndef __CNS3XXX_CORE_H

#define __CNS3XXX_CORE_H



extern void __iomem *gic_cpu_base_addr;

extern struct sys_timer cns3xxx_timer;



void __init cns3xxx_map_io(void);

arch/arm/mach-msm/board-msm8x60.c

+2 −4
Original line number Diff line number Diff line
@@ -28,8 +28,6 @@ 
#include <mach/board.h>

#include <mach/msm_iomap.h>



void __iomem *gic_cpu_base_addr;



unsigned long clk_get_max_axi_khz(void)

{

	return 0;
@@ -44,8 +42,8 @@ static void __init msm8x60_init_irq(void) 
{

	unsigned int i;



	gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE;

	gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, gic_cpu_base_addr);

	gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE,

		 (void *)MSM_QGIC_CPU_BASE);



	/* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */

	writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);