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Commit f27200f9 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

pinctrl: sh-pfc: r8a7795: Add SCIF_CLK support 



Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
(H)SCIF.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent a4c8a6d2

drivers/pinctrl/sh-pfc/pfc-r8a7795.c

+24 −0
Original line number Diff line number Diff line
@@ -2675,6 +2675,22 @@ static const unsigned int scif5_clk_mux[] = { 
	SCK5_MARK,

};



/* - SCIF Clock ------------------------------------------------------------- */

static const unsigned int scif_clk_a_pins[] = {

	/* SCIF_CLK */

	RCAR_GP_PIN(6, 23),

};

static const unsigned int scif_clk_a_mux[] = {

	SCIF_CLK_A_MARK,

};

static const unsigned int scif_clk_b_pins[] = {

	/* SCIF_CLK */

	RCAR_GP_PIN(5, 9),

};

static const unsigned int scif_clk_b_mux[] = {

	SCIF_CLK_B_MARK,

};



/* - SSI -------------------------------------------------------------------- */

static const unsigned int ssi0_data_pins[] = {

	/* SDATA */
@@ -3029,6 +3045,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = { 
	SH_PFC_PIN_GROUP(scif4_ctrl_c),

	SH_PFC_PIN_GROUP(scif5_data),

	SH_PFC_PIN_GROUP(scif5_clk),

	SH_PFC_PIN_GROUP(scif_clk_a),

	SH_PFC_PIN_GROUP(scif_clk_b),

	SH_PFC_PIN_GROUP(ssi0_data),

	SH_PFC_PIN_GROUP(ssi01239_ctrl),

	SH_PFC_PIN_GROUP(ssi1_data_a),
@@ -3292,6 +3310,11 @@ static const char * const scif5_groups[] = { 
	"scif5_clk",

};



static const char * const scif_clk_groups[] = {

	"scif_clk_a",

	"scif_clk_b",

};



static const char * const ssi_groups[] = {

	"ssi0_data",

	"ssi01239_ctrl",
@@ -3341,6 +3364,7 @@ static const struct sh_pfc_function pinmux_functions[] = { 
	SH_PFC_FUNCTION(scif3),

	SH_PFC_FUNCTION(scif4),

	SH_PFC_FUNCTION(scif5),

	SH_PFC_FUNCTION(scif_clk),

	SH_PFC_FUNCTION(ssi),

};