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Commit a4c8a6d2 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven
Browse files

pinctrl: sh-pfc: r8a7791: Add SCIF_CLK support



Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
(H)SCIF.

Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent ae9335dc
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+25 −0
Original line number Diff line number Diff line
@@ -3587,6 +3587,23 @@ static const unsigned int scifb2_data_d_pins[] = {
static const unsigned int scifb2_data_d_mux[] = {
	SCIFB2_RXD_D_MARK, SCIFB2_TXD_D_MARK,
};

/* - SCIF Clock ------------------------------------------------------------- */
static const unsigned int scif_clk_pins[] = {
	/* SCIF_CLK */
	RCAR_GP_PIN(2, 29),
};
static const unsigned int scif_clk_mux[] = {
	SCIF_CLK_MARK,
};
static const unsigned int scif_clk_b_pins[] = {
	/* SCIF_CLK */
	RCAR_GP_PIN(7, 19),
};
static const unsigned int scif_clk_b_mux[] = {
	SCIF_CLK_B_MARK,
};

/* - SDHI0 ------------------------------------------------------------------ */
static const unsigned int sdhi0_data1_pins[] = {
	/* D0 */
@@ -4495,6 +4512,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
	SH_PFC_PIN_GROUP(scifb2_data_c),
	SH_PFC_PIN_GROUP(scifb2_clk_c),
	SH_PFC_PIN_GROUP(scifb2_data_d),
	SH_PFC_PIN_GROUP(scif_clk),
	SH_PFC_PIN_GROUP(scif_clk_b),
	SH_PFC_PIN_GROUP(sdhi0_data1),
	SH_PFC_PIN_GROUP(sdhi0_data4),
	SH_PFC_PIN_GROUP(sdhi0_ctrl),
@@ -4961,6 +4980,11 @@ static const char * const scifb2_groups[] = {
	"scifb2_data_d",
};

static const char * const scif_clk_groups[] = {
	"scif_clk",
	"scif_clk_b",
};

static const char * const sdhi0_groups[] = {
	"sdhi0_data1",
	"sdhi0_data4",
@@ -5111,6 +5135,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
	SH_PFC_FUNCTION(scifb0),
	SH_PFC_FUNCTION(scifb1),
	SH_PFC_FUNCTION(scifb2),
	SH_PFC_FUNCTION(scif_clk),
	SH_PFC_FUNCTION(sdhi0),
	SH_PFC_FUNCTION(sdhi1),
	SH_PFC_FUNCTION(sdhi2),