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Commit edbb2a62 authored by Sayali Lokhande's avatar Sayali Lokhande Committed by Adam Bickett
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ARM: dts: msm: Enable sdhc2 for sdmshrike



Add DT entries to support sd card on sdmshrike
platform.

Change-Id: I3c8d6328abf151b0e6fd7804bc6dd23e52ce8eaf
Signed-off-by: default avatarSayali Lokhande <sayalil@codeaurora.org>
parent 6b6b9af4
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+74 −0
Original line number Diff line number Diff line
@@ -1687,5 +1687,79 @@
				output-low;
			};
		};

		sdc2_clk_on: sdc2_clk_on {
			config {
				pins = "sdc2_clk";
				bias-disable;		/* NO pull */
				drive-strength = <16>;	/* 16 MA */
			};
		};

		sdc2_clk_off: sdc2_clk_off {
			config {
				pins = "sdc2_clk";
				bias-disable;		/* NO pull */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc2_cmd_on: sdc2_cmd_on {
			config {
				pins = "sdc2_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <10>;	/* 10 MA */
			};
		};

		sdc2_cmd_off: sdc2_cmd_off {
			config {
				pins = "sdc2_cmd";
				bias-pull-up;		/* pull up */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc2_data_on: sdc2_data_on {
			config {
				pins = "sdc2_data";
				bias-pull-up;		/* pull up */
				drive-strength = <10>;	/* 10 MA */
			};
		};

		sdc2_data_off: sdc2_data_off {
			config {
				pins = "sdc2_data";
				bias-pull-up;		/* pull up */
				drive-strength = <2>;	/* 2 MA */
			};
		};

		sdc2_cd_on: cd_on {
			mux {
				pins = "gpio96"; /* sdcard_det */
				function = "gpio";
			};

			config {
				pins = "gpio96";
				drive-strength = <2>;
				bias-pull-up;
			};
		};

		sdc2_cd_off: cd_off {
			mux {
				pins = "gpio96";
				function = "gpio";
			};

			config {
				pins = "gpio96";
				drive-strength = <2>;
				bias-disable;
			};
		};
	};
};
+23 −0
Original line number Diff line number Diff line
@@ -9,3 +9,26 @@
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

&sdhc_2 {
	vdd-supply = <&pm855_2_l17>;
	qcom,vdd-voltage-level = <2960000 2960000>;
	qcom,vdd-current-level = <200 800000>;

	vdd-io-supply = <&pm855p_l6>;
	qcom,vdd-io-voltage-level = <1800000 2960000>;
	qcom,vdd-io-current-level = <200 22000>;

	pinctrl-names = "active", "sleep";
	pinctrl-0 = <&sdc2_clk_on  &sdc2_cmd_on &sdc2_data_on>;
	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off>;

	qcom,clk-rates = <400000 20000000 25000000 50000000>;
	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50";

	/delete-property/qcom,devfreq,freq-table;

	cd-gpios = <&tlmm 96 0x1>;

	status = "ok";
};
+65 −0
Original line number Diff line number Diff line
@@ -27,6 +27,10 @@
	qcom,msm-id = <340 0x0>;
	interrupt-parent = <&intc>;

	aliases {
		sdhc2 = &sdhc_2; /* SDC2 SD Card slot */
	};

	cpus {
		#address-cells = <2>;
		#size-cells = <0>;
@@ -347,6 +351,67 @@
		interrupt-parent = <&intc>;
	};

	sdhc_2: sdhci@8804000 {
		compatible = "qcom,sdhci-msm-v5";
		reg = <0x8804000 0x1000>;
		reg-names = "hc_mem";

		interrupts = <0 204 0>, <0 222 0>;
		interrupt-names = "hc_irq", "pwr_irq";

		qcom,bus-width = <4>;
		qcom,large-address-bus;

		qcom,clk-rates = <400000 20000000 25000000
					50000000 100000000 200000000>;
		qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50",
				      "SDR104";

		qcom,devfreq,freq-table = <50000000 200000000>;

		qcom,msm-bus,name = "sdhc2";
		qcom,msm-bus,num-cases = <8>;
		qcom,msm-bus,num-paths = <2>;
		qcom,msm-bus,vectors-KBps =
			/* No vote */
			<81 512 0 0>, <1 608 0 0>,
			/* 400 KB/s*/
			<81 512 1046 1600>,
			<1 608 1600 1600>,
			/* 20 MB/s */
			<81 512 52286 80000>,
			<1 608 80000 80000>,
			/* 25 MB/s */
			<81 512 65360 100000>,
			<1 608 100000 100000>,
			/* 50 MB/s */
			<81 512 130718 200000>,
			<1 608 100000 100000>,
			/* 100 MB/s */
			<81 512 261438 200000>,
			<1 608 130000 130000>,
			/* 200 MB/s */
			<81 512 261438 400000>,
			<1 608 300000 300000>,
			/* Max. bandwidth */
			<81 512 1338562 4096000>,
			<1 608 1338562 4096000>;
		qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
			100000000 200000000 4294967295>;

		/* PM QoS */
		qcom,pm-qos-irq-type = "affine_irq";
		qcom,pm-qos-irq-latency = <70 70>;
		qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
		qcom,pm-qos-legacy-latency-us = <70 70>, <70 70>;

		clocks = <&clock_gcc GCC_SDCC2_AHB_CLK>,
			<&clock_gcc GCC_SDCC2_APPS_CLK>;
		clock-names = "iface_clk", "core_clk";

		status = "disabled";
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <1 1 0xf08>,