Loading arch/mips/kernel/setup.c +5 −4 Original line number Diff line number Diff line Loading @@ -37,12 +37,13 @@ #include <asm/addrspace.h> #include <asm/bootinfo.h> #include <asm/cache.h> #include <asm/cpu.h> #include <asm/sections.h> #include <asm/setup.h> #include <asm/system.h> struct cpuinfo_mips cpu_data[NR_CPUS]; struct cpuinfo_mips cpu_data[NR_CPUS] __read_mostly; EXPORT_SYMBOL(cpu_data); Loading @@ -62,8 +63,8 @@ EXPORT_SYMBOL(PCI_DMA_BUS_IS_PHYS); * * These are initialized so they are in the .data section */ unsigned long mips_machtype = MACH_UNKNOWN; unsigned long mips_machgroup = MACH_GROUP_UNKNOWN; unsigned long mips_machtype __read_mostly = MACH_UNKNOWN; unsigned long mips_machgroup __read_mostly = MACH_GROUP_UNKNOWN; EXPORT_SYMBOL(mips_machtype); EXPORT_SYMBOL(mips_machgroup); Loading @@ -77,7 +78,7 @@ static char command_line[CL_SIZE]; * mips_io_port_base is the begin of the address space to which x86 style * I/O ports are mapped. */ const unsigned long mips_io_port_base = -1; const unsigned long mips_io_port_base __read_mostly = -1; EXPORT_SYMBOL(mips_io_port_base); /* Loading arch/mips/kernel/time.c +6 −3 Original line number Diff line number Diff line Loading @@ -25,6 +25,7 @@ #include <linux/module.h> #include <asm/bootinfo.h> #include <asm/cache.h> #include <asm/compiler.h> #include <asm/cpu.h> #include <asm/cpu-features.h> Loading Loading @@ -76,7 +77,7 @@ int (*rtc_set_mmss)(unsigned long); static unsigned int sll32_usecs_per_cycle; /* how many counter cycles in a jiffy */ static unsigned long cycles_per_jiffy; static unsigned long cycles_per_jiffy __read_mostly; /* Cycle counter value at the previous timer interrupt.. */ static unsigned int timerhi, timerlo; Loading @@ -98,7 +99,10 @@ static unsigned int null_hpt_read(void) return 0; } static void null_hpt_init(unsigned int count) { /* nothing */ } static void null_hpt_init(unsigned int count) { /* nothing */ } /* Loading Loading @@ -224,7 +228,6 @@ int do_settimeofday(struct timespec *tv) set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec); ntp_clear(); write_sequnlock_irq(&xtime_lock); clock_was_set(); return 0; Loading arch/mips/mm/c-r4k.c +7 −1 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #include <asm/bcache.h> #include <asm/bootinfo.h> #include <asm/cache.h> #include <asm/cacheops.h> #include <asm/cpu.h> #include <asm/cpu-features.h> Loading @@ -28,7 +29,12 @@ #include <asm/war.h> #include <asm/cacheflush.h> /* for run_uncached() */ static unsigned long icache_size, dcache_size, scache_size; /* * Must die. */ static unsigned long icache_size __read_mostly; static unsigned long dcache_size __read_mostly; static unsigned long scache_size __read_mostly; /* * Dummy cache handling routines for machines without boardcaches Loading Loading
arch/mips/kernel/setup.c +5 −4 Original line number Diff line number Diff line Loading @@ -37,12 +37,13 @@ #include <asm/addrspace.h> #include <asm/bootinfo.h> #include <asm/cache.h> #include <asm/cpu.h> #include <asm/sections.h> #include <asm/setup.h> #include <asm/system.h> struct cpuinfo_mips cpu_data[NR_CPUS]; struct cpuinfo_mips cpu_data[NR_CPUS] __read_mostly; EXPORT_SYMBOL(cpu_data); Loading @@ -62,8 +63,8 @@ EXPORT_SYMBOL(PCI_DMA_BUS_IS_PHYS); * * These are initialized so they are in the .data section */ unsigned long mips_machtype = MACH_UNKNOWN; unsigned long mips_machgroup = MACH_GROUP_UNKNOWN; unsigned long mips_machtype __read_mostly = MACH_UNKNOWN; unsigned long mips_machgroup __read_mostly = MACH_GROUP_UNKNOWN; EXPORT_SYMBOL(mips_machtype); EXPORT_SYMBOL(mips_machgroup); Loading @@ -77,7 +78,7 @@ static char command_line[CL_SIZE]; * mips_io_port_base is the begin of the address space to which x86 style * I/O ports are mapped. */ const unsigned long mips_io_port_base = -1; const unsigned long mips_io_port_base __read_mostly = -1; EXPORT_SYMBOL(mips_io_port_base); /* Loading
arch/mips/kernel/time.c +6 −3 Original line number Diff line number Diff line Loading @@ -25,6 +25,7 @@ #include <linux/module.h> #include <asm/bootinfo.h> #include <asm/cache.h> #include <asm/compiler.h> #include <asm/cpu.h> #include <asm/cpu-features.h> Loading Loading @@ -76,7 +77,7 @@ int (*rtc_set_mmss)(unsigned long); static unsigned int sll32_usecs_per_cycle; /* how many counter cycles in a jiffy */ static unsigned long cycles_per_jiffy; static unsigned long cycles_per_jiffy __read_mostly; /* Cycle counter value at the previous timer interrupt.. */ static unsigned int timerhi, timerlo; Loading @@ -98,7 +99,10 @@ static unsigned int null_hpt_read(void) return 0; } static void null_hpt_init(unsigned int count) { /* nothing */ } static void null_hpt_init(unsigned int count) { /* nothing */ } /* Loading Loading @@ -224,7 +228,6 @@ int do_settimeofday(struct timespec *tv) set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec); ntp_clear(); write_sequnlock_irq(&xtime_lock); clock_was_set(); return 0; Loading
arch/mips/mm/c-r4k.c +7 −1 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #include <asm/bcache.h> #include <asm/bootinfo.h> #include <asm/cache.h> #include <asm/cacheops.h> #include <asm/cpu.h> #include <asm/cpu-features.h> Loading @@ -28,7 +29,12 @@ #include <asm/war.h> #include <asm/cacheflush.h> /* for run_uncached() */ static unsigned long icache_size, dcache_size, scache_size; /* * Must die. */ static unsigned long icache_size __read_mostly; static unsigned long dcache_size __read_mostly; static unsigned long scache_size __read_mostly; /* * Dummy cache handling routines for machines without boardcaches Loading