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Commit ea35d8f8 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: add PBS device for PM8150B"

parents 89b97c70 f47a5ae0

arch/arm64/boot/dts/qcom/pm8150b.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -55,6 +55,11 @@ 
			clock-names = "xo";

		};



		pm8150b_pbs1: qcom,pbs@7200 {

			compatible = "qcom,qpnp-pbs";

			reg = <0x7200 0x100>;

		};



		pm8150b_qnovo: qcom,sdam-qnovo@b000 {

			compatible = "qcom,qpnp-qnovo5";

			reg = <0xb000 0x100>;
@@ -382,6 +387,7 @@ 
			#address-cells = <1>;

			#size-cells = <1>;

			qcom,pmic-revid = <&pm8150b_revid>;

			qcom,pmic-pbs = <&pm8150b_pbs1>;

			status = "okay";



			qcom,fg-batt-soc@4000 {

drivers/power/supply/qcom/qpnp-fg-gen4.c

+7 −5
Original line number Diff line number Diff line
@@ -1029,7 +1029,7 @@ static int fg_gen4_get_prop_soc_scale(struct fg_gen4_chip *chip) 
	return rc;

}



#define SDAM1_MEM_127_REG	0xB0BF

#define SDAM1_MEM_124_REG	0xB0BC

static int fg_gen4_set_calibrate_level(struct fg_gen4_chip *chip, int val)

{

	struct fg_dev *fg = &chip->fg;
@@ -1048,9 +1048,10 @@ static int fg_gen4_set_calibrate_level(struct fg_gen4_chip *chip, int val) 
		return 0;



	buf = (u8)val;

	rc = fg_write(fg, SDAM1_MEM_127_REG, &buf, 1);

	rc = fg_write(fg, SDAM1_MEM_124_REG, &buf, 1);

	if (rc < 0) {

		pr_err("Error in writing to 0xB0BF, rc=%d\n", rc);

		pr_err("Error in writing to 0x%04X, rc=%d\n",

			SDAM1_MEM_124_REG, rc);

		return rc;

	}
@@ -1061,9 +1062,10 @@ static int fg_gen4_set_calibrate_level(struct fg_gen4_chip *chip, int val) 
		return rc;

	}



	rc = fg_read(fg, SDAM1_MEM_127_REG, &buf, 1);

	rc = fg_read(fg, SDAM1_MEM_124_REG, &buf, 1);

	if (rc < 0) {

		pr_err("Error in reading from 0xB0BF, rc=%d\n", rc);

		pr_err("Error in reading from 0x%04X, rc=%d\n",

			SDAM1_MEM_124_REG, rc);

		return rc;

	}