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Commit 89b97c70 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "defconfig: msm: Enable SSBD config for Atoll"

parents 841624c9 bc129607

arch/arm64/configs/vendor/atoll-perf_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -67,6 +67,7 @@ CONFIG_ZSMALLOC=y 
CONFIG_BALANCE_ANON_FILE_RECLAIM=y

CONFIG_SECCOMP=y

# CONFIG_UNMAP_KERNEL_AT_EL0 is not set

CONFIG_ARM64_SSBD=y

CONFIG_ARMV8_DEPRECATED=y

CONFIG_SWP_EMULATION=y

CONFIG_CP15_BARRIER_EMULATION=y

arch/arm64/configs/vendor/atoll_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -72,6 +72,7 @@ CONFIG_BALANCE_ANON_FILE_RECLAIM=y 
CONFIG_SECCOMP=y

# CONFIG_UNMAP_KERNEL_AT_EL0 is not set

CONFIG_PRINT_VMEMLAYOUT=y

CONFIG_ARM64_SSBD=y

CONFIG_ARMV8_DEPRECATED=y

CONFIG_SWP_EMULATION=y

CONFIG_CP15_BARRIER_EMULATION=y

arch/arm64/include/asm/cpucaps.h

+2 −1
Original line number Diff line number Diff line
@@ -46,7 +46,8 @@ 
#define ARM64_HW_DBM				26

#define ARM64_SSBD				27

#define ARM64_MISMATCHED_CACHE_TYPE		28

#define ARM64_SSBS				29



#define ARM64_NCAPS				29

#define ARM64_NCAPS				30



#endif /* __ASM_CPUCAPS_H */

arch/arm64/include/asm/processor.h

+7 −0
Original line number Diff line number Diff line
@@ -147,6 +147,10 @@ static inline void start_thread(struct pt_regs *regs, unsigned long pc, 
{

	start_thread_common(regs, pc);

	regs->pstate = PSR_MODE_EL0t;



	if (arm64_get_ssbd_state() != ARM64_SSBD_FORCE_ENABLE)

		regs->pstate |= PSR_SSBS_BIT;



	regs->sp = sp;

}
@@ -163,6 +167,9 @@ static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc, 
	regs->pstate |= COMPAT_PSR_E_BIT;

#endif



	if (arm64_get_ssbd_state() != ARM64_SSBD_FORCE_ENABLE)

		regs->pstate |= COMPAT_PSR_SSBS_BIT;



	regs->compat_sp = sp;

}

#endif

arch/arm64/include/asm/ptrace.h

+1 −0
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ 
#define COMPAT_PSR_I_BIT	0x00000080

#define COMPAT_PSR_A_BIT	0x00000100

#define COMPAT_PSR_E_BIT	0x00000200

#define COMPAT_PSR_SSBS_BIT	0x00800000

#define COMPAT_PSR_J_BIT	0x01000000

#define COMPAT_PSR_Q_BIT	0x08000000

#define COMPAT_PSR_V_BIT	0x10000000