Commit e2f4c233 authored Jul 07, 2015 by Zhen Lei Committed by Will Deacon Jul 08, 2015

iommu/arm-smmu: Enlarge STRTAB_L1_SZ_SHIFT to support larger sidsize

Because we will choose the minimum value between STRTAB_L1_SZ_SHIFT and
IDR1.SIDSIZE, so enlarge STRTAB_L1_SZ_SHIFT will not impact the platforms
whose IDR1.SIDSIZE is smaller than old STRTAB_L1_SZ_SHIFT value.

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

parent 5d58c620

drivers/iommu/arm-smmu-v3.c

+3 −2

Original line number	Diff line number	Diff line
		@@ -199,9 +199,10 @@
		* Stream table.
		*
		* Linear: Enough to cover 1 << IDR1.SIDSIZE entries
		* 2lvl: 8k L1 entries, 256 lazy entries per table (each table covers a PCI bus)
		* 2lvl: 128k L1 entries,
		* 256 lazy entries per table (each table covers a PCI bus)
		*/
		#define STRTAB_L1_SZ_SHIFT 16
		#define STRTAB_L1_SZ_SHIFT 20
		#define STRTAB_SPLIT 8

		#define STRTAB_L1_DESC_DWORDS 1