Loading arch/arm64/boot/dts/qcom/sm8150-gpu.dtsi +2 −3 Original line number Diff line number Diff line Loading @@ -272,8 +272,7 @@ reg = <0x02CA0000 0x10000>; /* CB5(ATOS) & CB5/6/7 are protected by HYP */ qcom,protect = <0x40000 0xc000>; qcom,micro-mmu-control = <0x6000>; qcom,protect = <0xa0000 0xc000>; clocks =<&clock_gcc GCC_GPU_CFG_AHB_CLK>, <&clock_gcc GCC_DDRSS_GPU_AXI_CLK>, Loading @@ -289,7 +288,7 @@ compatible = "qcom,smmu-kgsl-cb"; label = "gfx3d_user"; iommus = <&kgsl_smmu 0x0 0x401>; qcom,gpu-offset = <0x48000>; qcom,gpu-offset = <0xa8000>; }; gfx3d_secure: gfx3d_secure { Loading Loading
arch/arm64/boot/dts/qcom/sm8150-gpu.dtsi +2 −3 Original line number Diff line number Diff line Loading @@ -272,8 +272,7 @@ reg = <0x02CA0000 0x10000>; /* CB5(ATOS) & CB5/6/7 are protected by HYP */ qcom,protect = <0x40000 0xc000>; qcom,micro-mmu-control = <0x6000>; qcom,protect = <0xa0000 0xc000>; clocks =<&clock_gcc GCC_GPU_CFG_AHB_CLK>, <&clock_gcc GCC_DDRSS_GPU_AXI_CLK>, Loading @@ -289,7 +288,7 @@ compatible = "qcom,smmu-kgsl-cb"; label = "gfx3d_user"; iommus = <&kgsl_smmu 0x0 0x401>; qcom,gpu-offset = <0x48000>; qcom,gpu-offset = <0xa8000>; }; gfx3d_secure: gfx3d_secure { Loading