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Commit de000a88 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'sunxi-clk-for-4.12-2' of...

Merge tag 'sunxi-clk-for-4.12-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into HEAD

Pull Allwinner clock changes, take 2 from Maxime Ripard:

A few minor bug and comment fixes, plus some fixes for the PRCM CCU driver
merged in the prior pull request

* tag 'sunxi-clk-for-4.12-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  clk: sunxi-ng: a80: Fix audio PLL comment not matching actual code
  clk: sunxi-ng: Fix round_rate/set_rate multiplier minimum mismatch
  clk: sunxi-ng: use 1 as fallback for minimum multiplier
  clk: sunxi-ng: fix PRCM CCU CLK_NUMBER value
  clk: sunxi-ng: fix PRCM CCU ir clk parent
parents b68adc23 7149c1be
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+1 −1
Original line number Diff line number Diff line
@@ -81,7 +81,7 @@ static SUNXI_CCU_GATE(apb0_i2c_clk, "apb0-i2c", "apb0",
static SUNXI_CCU_GATE(apb0_twd_clk,	"apb0-twd",	"apb0",
		      0x28, BIT(7), 0);

static const char * const r_mod0_default_parents[] = { "osc32K", "osc24M" };
static const char * const r_mod0_default_parents[] = { "osc32k", "osc24M" };
static SUNXI_CCU_MP_WITH_MUX_GATE(ir_clk, "ir",
				  r_mod0_default_parents, 0x54,
				  0, 4,		/* M */
+1 −1
Original line number Diff line number Diff line
@@ -22,6 +22,6 @@
#define CLK_AHB0	1
#define CLK_APB0	2

#define CLK_NUMBER	(CLK_APB0_TWD + 1)
#define CLK_NUMBER	(CLK_IR + 1)

#endif /* _CCU_SUN8I_R_H */
+1 −2
Original line number Diff line number Diff line
@@ -70,8 +70,7 @@ static struct ccu_mult pll_c1cpux_clk = {
/*
 * The Audio PLL has d1, d2 dividers in addition to the usual N, M
 * factors. Since we only need 2 frequencies from this PLL: 22.5792 MHz
 * and 24.576 MHz, ignore them for now. Enforce the default for them,
 * which is d1 = 0, d2 = 1.
 * and 24.576 MHz, ignore them for now. Enforce d1 = 0 and d2 = 0.
 */
#define SUN9I_A80_PLL_AUDIO_REG	0x008

+4 −4
Original line number Diff line number Diff line
@@ -102,9 +102,9 @@ static long ccu_nk_round_rate(struct clk_hw *hw, unsigned long rate,
	if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
		rate *= nk->fixed_post_div;

	_nk.min_n = nk->n.min;
	_nk.min_n = nk->n.min ?: 1;
	_nk.max_n = nk->n.max ?: 1 << nk->n.width;
	_nk.min_k = nk->k.min;
	_nk.min_k = nk->k.min ?: 1;
	_nk.max_k = nk->k.max ?: 1 << nk->k.width;

	ccu_nk_find_best(*parent_rate, rate, &_nk);
@@ -127,9 +127,9 @@ static int ccu_nk_set_rate(struct clk_hw *hw, unsigned long rate,
	if (nk->common.features & CCU_FEATURE_FIXED_POSTDIV)
		rate = rate * nk->fixed_post_div;

	_nk.min_n = nk->n.min;
	_nk.min_n = nk->n.min ?: 1;
	_nk.max_n = nk->n.max ?: 1 << nk->n.width;
	_nk.min_k = nk->k.min;
	_nk.min_k = nk->k.min ?: 1;
	_nk.max_k = nk->k.max ?: 1 << nk->k.width;

	ccu_nk_find_best(parent_rate, rate, &_nk);
+4 −4
Original line number Diff line number Diff line
@@ -109,9 +109,9 @@ static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
	struct ccu_nkm *nkm = data;
	struct _ccu_nkm _nkm;

	_nkm.min_n = nkm->n.min;
	_nkm.min_n = nkm->n.min ?: 1;
	_nkm.max_n = nkm->n.max ?: 1 << nkm->n.width;
	_nkm.min_k = nkm->k.min;
	_nkm.min_k = nkm->k.min ?: 1;
	_nkm.max_k = nkm->k.max ?: 1 << nkm->k.width;
	_nkm.min_m = 1;
	_nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
@@ -138,9 +138,9 @@ static int ccu_nkm_set_rate(struct clk_hw *hw, unsigned long rate,
	unsigned long flags;
	u32 reg;

	_nkm.min_n = nkm->n.min;
	_nkm.min_n = nkm->n.min ?: 1;
	_nkm.max_n = nkm->n.max ?: 1 << nkm->n.width;
	_nkm.min_k = nkm->k.min;
	_nkm.min_k = nkm->k.min ?: 1;
	_nkm.max_k = nkm->k.max ?: 1 << nkm->k.width;
	_nkm.min_m = 1;
	_nkm.max_m = nkm->m.max ?: 1 << nkm->m.width;
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