Loading drivers/gpu/drm/msm/sde/sde_encoder.c +21 −0 Original line number Diff line number Diff line Loading @@ -218,6 +218,8 @@ enum sde_enc_rc_states { * @prv_conn_roi: previous connector roi to optimize if unchanged * @crtc pointer to drm_crtc * @recovery_events_enabled: status of hw recovery feature enable by client * @elevated_ahb_vote: increase AHB bus speed for the first frame * after power collapse */ struct sde_encoder_virt { struct drm_encoder base; Loading Loading @@ -270,6 +272,7 @@ struct sde_encoder_virt { struct drm_crtc *crtc; bool recovery_events_enabled; bool elevated_ahb_vote; }; #define to_sde_encoder_virt(x) container_of(x, struct sde_encoder_virt, base) Loading Loading @@ -2052,6 +2055,7 @@ static int _sde_encoder_resource_control_helper(struct drm_encoder *drm_enc, return rc; } sde_enc->elevated_ahb_vote = true; /* enable DSI clks */ rc = sde_connector_clk_ctrl(sde_enc->cur_master->connector, true); Loading Loading @@ -3614,6 +3618,8 @@ static void _sde_encoder_kickoff_phys(struct sde_encoder_virt *sde_enc) uint32_t i; struct sde_ctl_flush_cfg pending_flush = {0,}; u32 pending_kickoff_cnt; struct msm_drm_private *priv = NULL; struct sde_kms *sde_kms = NULL; if (!sde_enc) { SDE_ERROR("invalid encoder\n"); Loading Loading @@ -3691,6 +3697,21 @@ static void _sde_encoder_kickoff_phys(struct sde_encoder_virt *sde_enc) } _sde_encoder_trigger_start(sde_enc->cur_master); if (sde_enc->elevated_ahb_vote) { priv = sde_enc->base.dev->dev_private; if (priv != NULL) { sde_kms = to_sde_kms(priv->kms); if (sde_kms != NULL) { sde_power_scale_reg_bus(&priv->phandle, sde_kms->core_client, VOTE_INDEX_LOW, false); } } sde_enc->elevated_ahb_vote = false; } } static void _sde_encoder_ppsplit_swap_intf_for_right_only_update( Loading drivers/gpu/drm/msm/sde/sde_kms.c +8 −0 Original line number Diff line number Diff line Loading @@ -915,6 +915,12 @@ static void sde_kms_prepare_commit(struct msm_kms *kms, goto end; } if (sde_kms->first_kickoff) { sde_power_scale_reg_bus(&priv->phandle, sde_kms->core_client, VOTE_INDEX_HIGH, false); sde_kms->first_kickoff = false; } for_each_crtc_in_state(state, crtc, crtc_state, i) { list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { Loading Loading @@ -2831,8 +2837,10 @@ static void sde_kms_handle_power_event(u32 event_type, void *usr) sde_irq_update(msm_kms, true); sde_vbif_init_memtypes(sde_kms); sde_kms_init_shared_hw(sde_kms); sde_kms->first_kickoff = true; } else if (event_type == SDE_POWER_EVENT_PRE_DISABLE) { sde_irq_update(msm_kms, false); sde_kms->first_kickoff = false; } } Loading drivers/gpu/drm/msm/sde/sde_kms.h +2 −0 Original line number Diff line number Diff line Loading @@ -272,6 +272,8 @@ struct sde_kms { atomic_t detach_sec_cb; atomic_t detach_all_cb; struct mutex secure_transition_lock; bool first_kickoff; }; struct vsync_info { Loading Loading
drivers/gpu/drm/msm/sde/sde_encoder.c +21 −0 Original line number Diff line number Diff line Loading @@ -218,6 +218,8 @@ enum sde_enc_rc_states { * @prv_conn_roi: previous connector roi to optimize if unchanged * @crtc pointer to drm_crtc * @recovery_events_enabled: status of hw recovery feature enable by client * @elevated_ahb_vote: increase AHB bus speed for the first frame * after power collapse */ struct sde_encoder_virt { struct drm_encoder base; Loading Loading @@ -270,6 +272,7 @@ struct sde_encoder_virt { struct drm_crtc *crtc; bool recovery_events_enabled; bool elevated_ahb_vote; }; #define to_sde_encoder_virt(x) container_of(x, struct sde_encoder_virt, base) Loading Loading @@ -2052,6 +2055,7 @@ static int _sde_encoder_resource_control_helper(struct drm_encoder *drm_enc, return rc; } sde_enc->elevated_ahb_vote = true; /* enable DSI clks */ rc = sde_connector_clk_ctrl(sde_enc->cur_master->connector, true); Loading Loading @@ -3614,6 +3618,8 @@ static void _sde_encoder_kickoff_phys(struct sde_encoder_virt *sde_enc) uint32_t i; struct sde_ctl_flush_cfg pending_flush = {0,}; u32 pending_kickoff_cnt; struct msm_drm_private *priv = NULL; struct sde_kms *sde_kms = NULL; if (!sde_enc) { SDE_ERROR("invalid encoder\n"); Loading Loading @@ -3691,6 +3697,21 @@ static void _sde_encoder_kickoff_phys(struct sde_encoder_virt *sde_enc) } _sde_encoder_trigger_start(sde_enc->cur_master); if (sde_enc->elevated_ahb_vote) { priv = sde_enc->base.dev->dev_private; if (priv != NULL) { sde_kms = to_sde_kms(priv->kms); if (sde_kms != NULL) { sde_power_scale_reg_bus(&priv->phandle, sde_kms->core_client, VOTE_INDEX_LOW, false); } } sde_enc->elevated_ahb_vote = false; } } static void _sde_encoder_ppsplit_swap_intf_for_right_only_update( Loading
drivers/gpu/drm/msm/sde/sde_kms.c +8 −0 Original line number Diff line number Diff line Loading @@ -915,6 +915,12 @@ static void sde_kms_prepare_commit(struct msm_kms *kms, goto end; } if (sde_kms->first_kickoff) { sde_power_scale_reg_bus(&priv->phandle, sde_kms->core_client, VOTE_INDEX_HIGH, false); sde_kms->first_kickoff = false; } for_each_crtc_in_state(state, crtc, crtc_state, i) { list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { Loading Loading @@ -2831,8 +2837,10 @@ static void sde_kms_handle_power_event(u32 event_type, void *usr) sde_irq_update(msm_kms, true); sde_vbif_init_memtypes(sde_kms); sde_kms_init_shared_hw(sde_kms); sde_kms->first_kickoff = true; } else if (event_type == SDE_POWER_EVENT_PRE_DISABLE) { sde_irq_update(msm_kms, false); sde_kms->first_kickoff = false; } } Loading
drivers/gpu/drm/msm/sde/sde_kms.h +2 −0 Original line number Diff line number Diff line Loading @@ -272,6 +272,8 @@ struct sde_kms { atomic_t detach_sec_cb; atomic_t detach_all_cb; struct mutex secure_transition_lock; bool first_kickoff; }; struct vsync_info { Loading