Loading drivers/gpu/drm/msm/sde/sde_crtc.c +13 −1 Original line number Diff line number Diff line Loading @@ -2336,6 +2336,8 @@ void sde_crtc_prepare_commit(struct drm_crtc *crtc, cstate = to_sde_crtc_state(crtc->state); SDE_EVT32_VERBOSE(DRMID(crtc)); SDE_ATRACE_BEGIN("sde_crtc_prepare_commit"); /* identify connectors attached to this crtc */ cstate->num_connectors = 0; Loading @@ -2357,6 +2359,7 @@ void sde_crtc_prepare_commit(struct drm_crtc *crtc, /* prepare main output fence */ sde_fence_prepare(sde_crtc->output_fence); SDE_ATRACE_END("sde_crtc_prepare_commit"); } /** Loading Loading @@ -3208,6 +3211,7 @@ static void sde_crtc_atomic_begin(struct drm_crtc *crtc, if (!sde_kms) return; SDE_ATRACE_BEGIN("crtc_atomic_begin"); SDE_DEBUG("crtc%d\n", crtc->base.id); sde_crtc = to_sde_crtc(crtc); Loading @@ -3233,7 +3237,7 @@ static void sde_crtc_atomic_begin(struct drm_crtc *crtc, * nothing else needs to be done. */ if (unlikely(!sde_crtc->num_mixers)) return; goto end; _sde_crtc_blend_setup(crtc, old_state, true); _sde_crtc_dest_scaler_setup(crtc); Loading @@ -3260,6 +3264,9 @@ static void sde_crtc_atomic_begin(struct drm_crtc *crtc, * This is safe because no pp_done will happen before SW trigger * in command mode. */ end: SDE_ATRACE_END("crtc_atomic_begin"); } static void sde_crtc_atomic_flush(struct drm_crtc *crtc, Loading Loading @@ -3320,6 +3327,8 @@ static void sde_crtc_atomic_flush(struct drm_crtc *crtc, if (unlikely(!sde_crtc->num_mixers)) return; SDE_ATRACE_BEGIN("sde_crtc_atomic_flush"); /* * For planes without commit update, drm framework will not add * those planes to current state since hardware update is not Loading Loading @@ -3368,6 +3377,7 @@ static void sde_crtc_atomic_flush(struct drm_crtc *crtc, } /* Kickoff will be scheduled by outer layer */ SDE_ATRACE_END("sde_crtc_atomic_flush"); } /** Loading Loading @@ -5392,6 +5402,7 @@ static int sde_crtc_atomic_set_property(struct drm_crtc *crtc, sde_crtc = to_sde_crtc(crtc); cstate = to_sde_crtc_state(state); SDE_ATRACE_BEGIN("sde_crtc_atomic_set_property"); /* check with cp property system first */ ret = sde_cp_crtc_set_property(crtc, property, val); if (ret != -ENOENT) Loading Loading @@ -5476,6 +5487,7 @@ static int sde_crtc_atomic_set_property(struct drm_crtc *crtc, property->base.id, val); } SDE_ATRACE_END("sde_crtc_atomic_set_property"); return ret; } Loading drivers/gpu/drm/msm/sde/sde_encoder.c +12 −5 Original line number Diff line number Diff line Loading @@ -2944,7 +2944,9 @@ static void sde_encoder_off_work(struct kthread_work *work) } drm_enc = &sde_enc->base; SDE_ATRACE_BEGIN("sde_encoder_off_work"); sde_encoder_idle_request(drm_enc); SDE_ATRACE_END("sde_encoder_off_work"); } static void sde_encoder_virt_enable(struct drm_encoder *drm_enc) Loading Loading @@ -4262,7 +4264,7 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, ln_cnt1 = -EINVAL; /* prepare for next kickoff, may include waiting on previous kickoff */ SDE_ATRACE_BEGIN("enc_prepare_for_kickoff"); SDE_ATRACE_BEGIN("sde_encoder_prepare_for_kickoff"); for (i = 0; i < sde_enc->num_phys_encs; i++) { phys = sde_enc->phys_encs[i]; params->is_primary = sde_enc->disp_info.is_primary; Loading @@ -4284,12 +4286,12 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, } } } SDE_ATRACE_END("enc_prepare_for_kickoff"); rc = sde_encoder_resource_control(drm_enc, SDE_ENC_RC_EVENT_KICKOFF); if (rc) { SDE_ERROR_ENC(sde_enc, "resource kickoff failed rc %d\n", rc); return rc; ret = rc; goto end; } /* if any phys needs reset, reset all phys, in-order */ Loading Loading @@ -4334,6 +4336,8 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, } } end: SDE_ATRACE_END("sde_encoder_prepare_for_kickoff"); return ret; } Loading Loading @@ -5060,6 +5064,7 @@ int sde_encoder_wait_for_event(struct drm_encoder *drm_enc, int (*fn_wait)(struct sde_encoder_phys *phys_enc) = NULL; struct sde_encoder_virt *sde_enc = NULL; int i, ret = 0; char atrace_buf[32]; if (!drm_enc) { SDE_ERROR("invalid encoder\n"); Loading Loading @@ -5091,9 +5096,11 @@ int sde_encoder_wait_for_event(struct drm_encoder *drm_enc, }; if (phys && fn_wait) { SDE_ATRACE_BEGIN("wait_for_completion_event"); snprintf(atrace_buf, sizeof(atrace_buf), "wait_completion_event_%d", event); SDE_ATRACE_BEGIN(atrace_buf); ret = fn_wait(phys); SDE_ATRACE_END("wait_for_completion_event"); SDE_ATRACE_END(atrace_buf); if (ret) return ret; } Loading drivers/gpu/drm/msm/sde/sde_kms.c +33 −5 Original line number Diff line number Diff line Loading @@ -358,12 +358,20 @@ static void _sde_debugfs_destroy(struct sde_kms *sde_kms) static int sde_kms_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) { return sde_crtc_vblank(crtc, true); int ret = 0; SDE_ATRACE_BEGIN("sde_kms_enable_vblank"); ret = sde_crtc_vblank(crtc, true); SDE_ATRACE_END("sde_kms_enable_vblank"); return ret; } static void sde_kms_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) { SDE_ATRACE_BEGIN("sde_kms_disable_vblank"); sde_crtc_vblank(crtc, false); SDE_ATRACE_END("sde_kms_disable_vblank"); } static void sde_kms_wait_for_frame_transfer_complete(struct msm_kms *kms, Loading Loading @@ -898,12 +906,13 @@ static void sde_kms_prepare_commit(struct msm_kms *kms, return; priv = dev->dev_private; SDE_ATRACE_BEGIN("prepare_commit"); rc = sde_power_resource_enable(&priv->phandle, sde_kms->core_client, true); if (rc) { SDE_ERROR("failed to enable power resource %d\n", rc); SDE_EVT32(rc, SDE_EVTLOG_ERROR); return; goto end; } for_each_crtc_in_state(state, crtc, crtc_state, i) { Loading @@ -922,6 +931,8 @@ static void sde_kms_prepare_commit(struct msm_kms *kms, * transitions prepare below if any transtions is required. */ sde_kms_prepare_secure_transition(kms, state); end: SDE_ATRACE_END("prepare_commit"); } static void sde_kms_commit(struct msm_kms *kms, Loading @@ -941,12 +952,15 @@ static void sde_kms_commit(struct msm_kms *kms, return; } SDE_ATRACE_BEGIN("sde_kms_commit"); for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) { if (crtc->state->active) { SDE_EVT32(DRMID(crtc)); sde_crtc_commit_kickoff(crtc, old_crtc_state); } } SDE_ATRACE_END("sde_kms_commit"); } static void _sde_kms_release_splash_resource(struct sde_kms *sde_kms, Loading Loading @@ -1030,6 +1044,8 @@ static void sde_kms_complete_commit(struct msm_kms *kms, return; } SDE_ATRACE_BEGIN("sde_kms_complete_commit"); for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) { sde_crtc_complete_commit(crtc, old_crtc_state); Loading @@ -1056,6 +1072,7 @@ static void sde_kms_complete_commit(struct msm_kms *kms, _sde_kms_release_splash_resource(sde_kms, old_state); SDE_EVT32_VERBOSE(SDE_EVTLOG_FUNC_EXIT); SDE_ATRACE_END("sde_kms_complete_commit"); } static void sde_kms_wait_for_commit_done(struct msm_kms *kms, Loading @@ -1082,6 +1099,7 @@ static void sde_kms_wait_for_commit_done(struct msm_kms *kms, return; } SDE_ATRACE_BEGIN("sde_kms_wait_for_commit_done"); list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { if (encoder->crtc != crtc) continue; Loading @@ -1099,6 +1117,8 @@ static void sde_kms_wait_for_commit_done(struct msm_kms *kms, sde_crtc_complete_flip(crtc, NULL); } SDE_ATRACE_END("sde_ksm_wait_for_commit_done"); } static void sde_kms_prepare_fence(struct msm_kms *kms, Loading @@ -1113,6 +1133,7 @@ static void sde_kms_prepare_fence(struct msm_kms *kms, return; } SDE_ATRACE_BEGIN("sde_kms_prepare_fence"); retry: /* attempt to acquire ww mutex for connection */ rc = drm_modeset_lock(&old_state->dev->mode_config.connection_mutex, Loading @@ -1128,6 +1149,8 @@ static void sde_kms_prepare_fence(struct msm_kms *kms, if (crtc->state->active) sde_crtc_prepare_commit(crtc, old_crtc_state); } SDE_ATRACE_END("sde_kms_prepare_fence"); } /** Loading Loading @@ -2194,14 +2217,16 @@ static int sde_kms_atomic_check(struct msm_kms *kms, sde_kms = to_sde_kms(kms); dev = sde_kms->dev; SDE_ATRACE_BEGIN("atomic_check"); if (sde_kms_is_suspend_blocked(dev)) { SDE_DEBUG("suspended, skip atomic_check\n"); return -EBUSY; ret = -EBUSY; goto end; } ret = drm_atomic_helper_check(dev, state); if (ret) return ret; goto end; /* * Check if any secure transition(moving CRTC between secure and * non-secure state and vice-versa) is allowed or not. when moving Loading @@ -2209,7 +2234,10 @@ static int sde_kms_atomic_check(struct msm_kms *kms, * be staged on the CRTC, and only one CRTC can be active during * Secure state */ return sde_kms_check_secure_transition(kms, state); ret = sde_kms_check_secure_transition(kms, state); end: SDE_ATRACE_END("atomic_check"); return ret; } static struct msm_gem_address_space* Loading drivers/gpu/drm/msm/sde_power_handle.c +9 −2 Original line number Diff line number Diff line Loading @@ -642,9 +642,13 @@ static int sde_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) { int rc = 0; if (reg_bus_hdl) if (reg_bus_hdl) { SDE_ATRACE_BEGIN("msm_bus_scale_req"); rc = msm_bus_scale_client_update_request(reg_bus_hdl, usecase_ndx); SDE_ATRACE_END("msm_bus_scale_req"); } if (rc) pr_err("failed to set reg bus vote rc=%d\n", rc); Loading Loading @@ -963,6 +967,8 @@ int sde_power_resource_enable(struct sde_power_handle *phandle, if (!changed) goto end; SDE_ATRACE_BEGIN("sde_power_resource_enable"); /* RSC client init */ sde_power_rsc_client_init(phandle); Loading Loading @@ -1034,7 +1040,7 @@ int sde_power_resource_enable(struct sde_power_handle *phandle, end: SDE_EVT32_VERBOSE(enable, SDE_EVTLOG_FUNC_EXIT); mutex_unlock(&phandle->phandle_lock); SDE_ATRACE_END("sde_power_resource_enable"); return rc; clk_err: Loading @@ -1049,6 +1055,7 @@ int sde_power_resource_enable(struct sde_power_handle *phandle, data_bus_hdl_err: phandle->current_usecase_ndx = prev_usecase_ndx; mutex_unlock(&phandle->phandle_lock); SDE_ATRACE_END("sde_power_resource_enable"); return rc; } Loading Loading
drivers/gpu/drm/msm/sde/sde_crtc.c +13 −1 Original line number Diff line number Diff line Loading @@ -2336,6 +2336,8 @@ void sde_crtc_prepare_commit(struct drm_crtc *crtc, cstate = to_sde_crtc_state(crtc->state); SDE_EVT32_VERBOSE(DRMID(crtc)); SDE_ATRACE_BEGIN("sde_crtc_prepare_commit"); /* identify connectors attached to this crtc */ cstate->num_connectors = 0; Loading @@ -2357,6 +2359,7 @@ void sde_crtc_prepare_commit(struct drm_crtc *crtc, /* prepare main output fence */ sde_fence_prepare(sde_crtc->output_fence); SDE_ATRACE_END("sde_crtc_prepare_commit"); } /** Loading Loading @@ -3208,6 +3211,7 @@ static void sde_crtc_atomic_begin(struct drm_crtc *crtc, if (!sde_kms) return; SDE_ATRACE_BEGIN("crtc_atomic_begin"); SDE_DEBUG("crtc%d\n", crtc->base.id); sde_crtc = to_sde_crtc(crtc); Loading @@ -3233,7 +3237,7 @@ static void sde_crtc_atomic_begin(struct drm_crtc *crtc, * nothing else needs to be done. */ if (unlikely(!sde_crtc->num_mixers)) return; goto end; _sde_crtc_blend_setup(crtc, old_state, true); _sde_crtc_dest_scaler_setup(crtc); Loading @@ -3260,6 +3264,9 @@ static void sde_crtc_atomic_begin(struct drm_crtc *crtc, * This is safe because no pp_done will happen before SW trigger * in command mode. */ end: SDE_ATRACE_END("crtc_atomic_begin"); } static void sde_crtc_atomic_flush(struct drm_crtc *crtc, Loading Loading @@ -3320,6 +3327,8 @@ static void sde_crtc_atomic_flush(struct drm_crtc *crtc, if (unlikely(!sde_crtc->num_mixers)) return; SDE_ATRACE_BEGIN("sde_crtc_atomic_flush"); /* * For planes without commit update, drm framework will not add * those planes to current state since hardware update is not Loading Loading @@ -3368,6 +3377,7 @@ static void sde_crtc_atomic_flush(struct drm_crtc *crtc, } /* Kickoff will be scheduled by outer layer */ SDE_ATRACE_END("sde_crtc_atomic_flush"); } /** Loading Loading @@ -5392,6 +5402,7 @@ static int sde_crtc_atomic_set_property(struct drm_crtc *crtc, sde_crtc = to_sde_crtc(crtc); cstate = to_sde_crtc_state(state); SDE_ATRACE_BEGIN("sde_crtc_atomic_set_property"); /* check with cp property system first */ ret = sde_cp_crtc_set_property(crtc, property, val); if (ret != -ENOENT) Loading Loading @@ -5476,6 +5487,7 @@ static int sde_crtc_atomic_set_property(struct drm_crtc *crtc, property->base.id, val); } SDE_ATRACE_END("sde_crtc_atomic_set_property"); return ret; } Loading
drivers/gpu/drm/msm/sde/sde_encoder.c +12 −5 Original line number Diff line number Diff line Loading @@ -2944,7 +2944,9 @@ static void sde_encoder_off_work(struct kthread_work *work) } drm_enc = &sde_enc->base; SDE_ATRACE_BEGIN("sde_encoder_off_work"); sde_encoder_idle_request(drm_enc); SDE_ATRACE_END("sde_encoder_off_work"); } static void sde_encoder_virt_enable(struct drm_encoder *drm_enc) Loading Loading @@ -4262,7 +4264,7 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, ln_cnt1 = -EINVAL; /* prepare for next kickoff, may include waiting on previous kickoff */ SDE_ATRACE_BEGIN("enc_prepare_for_kickoff"); SDE_ATRACE_BEGIN("sde_encoder_prepare_for_kickoff"); for (i = 0; i < sde_enc->num_phys_encs; i++) { phys = sde_enc->phys_encs[i]; params->is_primary = sde_enc->disp_info.is_primary; Loading @@ -4284,12 +4286,12 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, } } } SDE_ATRACE_END("enc_prepare_for_kickoff"); rc = sde_encoder_resource_control(drm_enc, SDE_ENC_RC_EVENT_KICKOFF); if (rc) { SDE_ERROR_ENC(sde_enc, "resource kickoff failed rc %d\n", rc); return rc; ret = rc; goto end; } /* if any phys needs reset, reset all phys, in-order */ Loading Loading @@ -4334,6 +4336,8 @@ int sde_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc, } } end: SDE_ATRACE_END("sde_encoder_prepare_for_kickoff"); return ret; } Loading Loading @@ -5060,6 +5064,7 @@ int sde_encoder_wait_for_event(struct drm_encoder *drm_enc, int (*fn_wait)(struct sde_encoder_phys *phys_enc) = NULL; struct sde_encoder_virt *sde_enc = NULL; int i, ret = 0; char atrace_buf[32]; if (!drm_enc) { SDE_ERROR("invalid encoder\n"); Loading Loading @@ -5091,9 +5096,11 @@ int sde_encoder_wait_for_event(struct drm_encoder *drm_enc, }; if (phys && fn_wait) { SDE_ATRACE_BEGIN("wait_for_completion_event"); snprintf(atrace_buf, sizeof(atrace_buf), "wait_completion_event_%d", event); SDE_ATRACE_BEGIN(atrace_buf); ret = fn_wait(phys); SDE_ATRACE_END("wait_for_completion_event"); SDE_ATRACE_END(atrace_buf); if (ret) return ret; } Loading
drivers/gpu/drm/msm/sde/sde_kms.c +33 −5 Original line number Diff line number Diff line Loading @@ -358,12 +358,20 @@ static void _sde_debugfs_destroy(struct sde_kms *sde_kms) static int sde_kms_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) { return sde_crtc_vblank(crtc, true); int ret = 0; SDE_ATRACE_BEGIN("sde_kms_enable_vblank"); ret = sde_crtc_vblank(crtc, true); SDE_ATRACE_END("sde_kms_enable_vblank"); return ret; } static void sde_kms_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) { SDE_ATRACE_BEGIN("sde_kms_disable_vblank"); sde_crtc_vblank(crtc, false); SDE_ATRACE_END("sde_kms_disable_vblank"); } static void sde_kms_wait_for_frame_transfer_complete(struct msm_kms *kms, Loading Loading @@ -898,12 +906,13 @@ static void sde_kms_prepare_commit(struct msm_kms *kms, return; priv = dev->dev_private; SDE_ATRACE_BEGIN("prepare_commit"); rc = sde_power_resource_enable(&priv->phandle, sde_kms->core_client, true); if (rc) { SDE_ERROR("failed to enable power resource %d\n", rc); SDE_EVT32(rc, SDE_EVTLOG_ERROR); return; goto end; } for_each_crtc_in_state(state, crtc, crtc_state, i) { Loading @@ -922,6 +931,8 @@ static void sde_kms_prepare_commit(struct msm_kms *kms, * transitions prepare below if any transtions is required. */ sde_kms_prepare_secure_transition(kms, state); end: SDE_ATRACE_END("prepare_commit"); } static void sde_kms_commit(struct msm_kms *kms, Loading @@ -941,12 +952,15 @@ static void sde_kms_commit(struct msm_kms *kms, return; } SDE_ATRACE_BEGIN("sde_kms_commit"); for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) { if (crtc->state->active) { SDE_EVT32(DRMID(crtc)); sde_crtc_commit_kickoff(crtc, old_crtc_state); } } SDE_ATRACE_END("sde_kms_commit"); } static void _sde_kms_release_splash_resource(struct sde_kms *sde_kms, Loading Loading @@ -1030,6 +1044,8 @@ static void sde_kms_complete_commit(struct msm_kms *kms, return; } SDE_ATRACE_BEGIN("sde_kms_complete_commit"); for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) { sde_crtc_complete_commit(crtc, old_crtc_state); Loading @@ -1056,6 +1072,7 @@ static void sde_kms_complete_commit(struct msm_kms *kms, _sde_kms_release_splash_resource(sde_kms, old_state); SDE_EVT32_VERBOSE(SDE_EVTLOG_FUNC_EXIT); SDE_ATRACE_END("sde_kms_complete_commit"); } static void sde_kms_wait_for_commit_done(struct msm_kms *kms, Loading @@ -1082,6 +1099,7 @@ static void sde_kms_wait_for_commit_done(struct msm_kms *kms, return; } SDE_ATRACE_BEGIN("sde_kms_wait_for_commit_done"); list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { if (encoder->crtc != crtc) continue; Loading @@ -1099,6 +1117,8 @@ static void sde_kms_wait_for_commit_done(struct msm_kms *kms, sde_crtc_complete_flip(crtc, NULL); } SDE_ATRACE_END("sde_ksm_wait_for_commit_done"); } static void sde_kms_prepare_fence(struct msm_kms *kms, Loading @@ -1113,6 +1133,7 @@ static void sde_kms_prepare_fence(struct msm_kms *kms, return; } SDE_ATRACE_BEGIN("sde_kms_prepare_fence"); retry: /* attempt to acquire ww mutex for connection */ rc = drm_modeset_lock(&old_state->dev->mode_config.connection_mutex, Loading @@ -1128,6 +1149,8 @@ static void sde_kms_prepare_fence(struct msm_kms *kms, if (crtc->state->active) sde_crtc_prepare_commit(crtc, old_crtc_state); } SDE_ATRACE_END("sde_kms_prepare_fence"); } /** Loading Loading @@ -2194,14 +2217,16 @@ static int sde_kms_atomic_check(struct msm_kms *kms, sde_kms = to_sde_kms(kms); dev = sde_kms->dev; SDE_ATRACE_BEGIN("atomic_check"); if (sde_kms_is_suspend_blocked(dev)) { SDE_DEBUG("suspended, skip atomic_check\n"); return -EBUSY; ret = -EBUSY; goto end; } ret = drm_atomic_helper_check(dev, state); if (ret) return ret; goto end; /* * Check if any secure transition(moving CRTC between secure and * non-secure state and vice-versa) is allowed or not. when moving Loading @@ -2209,7 +2234,10 @@ static int sde_kms_atomic_check(struct msm_kms *kms, * be staged on the CRTC, and only one CRTC can be active during * Secure state */ return sde_kms_check_secure_transition(kms, state); ret = sde_kms_check_secure_transition(kms, state); end: SDE_ATRACE_END("atomic_check"); return ret; } static struct msm_gem_address_space* Loading
drivers/gpu/drm/msm/sde_power_handle.c +9 −2 Original line number Diff line number Diff line Loading @@ -642,9 +642,13 @@ static int sde_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) { int rc = 0; if (reg_bus_hdl) if (reg_bus_hdl) { SDE_ATRACE_BEGIN("msm_bus_scale_req"); rc = msm_bus_scale_client_update_request(reg_bus_hdl, usecase_ndx); SDE_ATRACE_END("msm_bus_scale_req"); } if (rc) pr_err("failed to set reg bus vote rc=%d\n", rc); Loading Loading @@ -963,6 +967,8 @@ int sde_power_resource_enable(struct sde_power_handle *phandle, if (!changed) goto end; SDE_ATRACE_BEGIN("sde_power_resource_enable"); /* RSC client init */ sde_power_rsc_client_init(phandle); Loading Loading @@ -1034,7 +1040,7 @@ int sde_power_resource_enable(struct sde_power_handle *phandle, end: SDE_EVT32_VERBOSE(enable, SDE_EVTLOG_FUNC_EXIT); mutex_unlock(&phandle->phandle_lock); SDE_ATRACE_END("sde_power_resource_enable"); return rc; clk_err: Loading @@ -1049,6 +1055,7 @@ int sde_power_resource_enable(struct sde_power_handle *phandle, data_bus_hdl_err: phandle->current_usecase_ndx = prev_usecase_ndx; mutex_unlock(&phandle->phandle_lock); SDE_ATRACE_END("sde_power_resource_enable"); return rc; } Loading