Loading drivers/gpu/drm/msm/dp/dp_display.c +6 −0 Original line number Diff line number Diff line Loading @@ -1992,6 +1992,12 @@ static int dp_display_mst_connector_install(struct dp_display *dp_display, mst_connector = kmalloc(sizeof(struct dp_mst_connector), GFP_KERNEL); if (!mst_connector) { mutex_unlock(&dp->debug->dp_mst_connector_list.lock); mutex_unlock(&dp->session_lock); return -ENOMEM; } mst_connector->debug_en = false; mst_connector->conn = connector; mst_connector->con_id = connector->base.id; Loading drivers/gpu/drm/msm/dsi-staging/dsi_display.c +22 −12 Original line number Diff line number Diff line Loading @@ -3022,7 +3022,7 @@ int dsi_pre_clkoff_cb(void *priv, struct dsi_display_ctrl *ctrl; if ((clk & DSI_LINK_CLK) && (new_state == DSI_CLK_OFF) && (l_type && DSI_LINK_LP_CLK)) { (l_type & DSI_LINK_LP_CLK)) { /* * If continuous clock is enabled then disable it * before entering into ULPS Mode. Loading @@ -3045,6 +3045,20 @@ int dsi_pre_clkoff_cb(void *priv, __func__, rc); } if ((clk & DSI_LINK_CLK) && (new_state == DSI_CLK_OFF) && (l_type & DSI_LINK_HS_CLK)) { /* * PHY clock gating should be disabled before the PLL and the * branch clocks are turned off. Otherwise, it is possible that * the clock RCGs may not be turned off correctly resulting * in clock warnings. */ rc = dsi_display_config_clk_gating(display, false); if (rc) pr_err("[%s] failed to disable clk gating, rc=%d\n", display->name, rc); } if ((clk & DSI_CORE_CLK) && (new_state == DSI_CLK_OFF)) { /* * Enable DSI clamps only if entering idle power collapse or Loading @@ -3057,10 +3071,6 @@ int dsi_pre_clkoff_cb(void *priv, if (rc) pr_err("%s: Failed to enable dsi clamps. rc=%d\n", __func__, rc); rc = dsi_display_config_clk_gating(display, false); if (rc) pr_err("[%s] failed to disable clk gating, rc=%d\n", display->name, rc); rc = dsi_display_phy_reset_config(display, false); if (rc) Loading Loading @@ -3140,13 +3150,6 @@ int dsi_post_clkon_cb(void *priv, } } rc = dsi_display_config_clk_gating(display, true); if (rc) { pr_err("[%s] failed to enable clk gating %d\n", display->name, rc); goto error; } rc = dsi_display_phy_reset_config(display, true); if (rc) { pr_err("%s: Failed to reset phy, rc=%d\n", Loading Loading @@ -3183,6 +3186,13 @@ int dsi_post_clkon_cb(void *priv, if (display->panel->host_config.force_hs_clk_lane) _dsi_display_continuous_clk_ctrl(display, true); rc = dsi_display_config_clk_gating(display, true); if (rc) { pr_err("[%s] failed to enable clk gating %d\n", display->name, rc); goto error; } } /* enable dsi to serve irqs */ Loading Loading
drivers/gpu/drm/msm/dp/dp_display.c +6 −0 Original line number Diff line number Diff line Loading @@ -1992,6 +1992,12 @@ static int dp_display_mst_connector_install(struct dp_display *dp_display, mst_connector = kmalloc(sizeof(struct dp_mst_connector), GFP_KERNEL); if (!mst_connector) { mutex_unlock(&dp->debug->dp_mst_connector_list.lock); mutex_unlock(&dp->session_lock); return -ENOMEM; } mst_connector->debug_en = false; mst_connector->conn = connector; mst_connector->con_id = connector->base.id; Loading
drivers/gpu/drm/msm/dsi-staging/dsi_display.c +22 −12 Original line number Diff line number Diff line Loading @@ -3022,7 +3022,7 @@ int dsi_pre_clkoff_cb(void *priv, struct dsi_display_ctrl *ctrl; if ((clk & DSI_LINK_CLK) && (new_state == DSI_CLK_OFF) && (l_type && DSI_LINK_LP_CLK)) { (l_type & DSI_LINK_LP_CLK)) { /* * If continuous clock is enabled then disable it * before entering into ULPS Mode. Loading @@ -3045,6 +3045,20 @@ int dsi_pre_clkoff_cb(void *priv, __func__, rc); } if ((clk & DSI_LINK_CLK) && (new_state == DSI_CLK_OFF) && (l_type & DSI_LINK_HS_CLK)) { /* * PHY clock gating should be disabled before the PLL and the * branch clocks are turned off. Otherwise, it is possible that * the clock RCGs may not be turned off correctly resulting * in clock warnings. */ rc = dsi_display_config_clk_gating(display, false); if (rc) pr_err("[%s] failed to disable clk gating, rc=%d\n", display->name, rc); } if ((clk & DSI_CORE_CLK) && (new_state == DSI_CLK_OFF)) { /* * Enable DSI clamps only if entering idle power collapse or Loading @@ -3057,10 +3071,6 @@ int dsi_pre_clkoff_cb(void *priv, if (rc) pr_err("%s: Failed to enable dsi clamps. rc=%d\n", __func__, rc); rc = dsi_display_config_clk_gating(display, false); if (rc) pr_err("[%s] failed to disable clk gating, rc=%d\n", display->name, rc); rc = dsi_display_phy_reset_config(display, false); if (rc) Loading Loading @@ -3140,13 +3150,6 @@ int dsi_post_clkon_cb(void *priv, } } rc = dsi_display_config_clk_gating(display, true); if (rc) { pr_err("[%s] failed to enable clk gating %d\n", display->name, rc); goto error; } rc = dsi_display_phy_reset_config(display, true); if (rc) { pr_err("%s: Failed to reset phy, rc=%d\n", Loading Loading @@ -3183,6 +3186,13 @@ int dsi_post_clkon_cb(void *priv, if (display->panel->host_config.force_hs_clk_lane) _dsi_display_continuous_clk_ctrl(display, true); rc = dsi_display_config_clk_gating(display, true); if (rc) { pr_err("[%s] failed to enable clk gating %d\n", display->name, rc); goto error; } } /* enable dsi to serve irqs */ Loading