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Commit d5b4e25d authored by Christian König's avatar Christian König Committed by Alex Deucher
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drm/amdgpu: implement HDP functions for UVD v2



Flush and invalidate the HDP caches.

v2: fix typo in comment

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d1371f8c
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+30 −0
Original line number Diff line number Diff line
@@ -34,6 +34,8 @@
#include "oss/oss_2_0_d.h"
#include "oss/oss_2_0_sh_mask.h"

#include "bif/bif_4_1_d.h"

static void uvd_v4_2_mc_resume(struct amdgpu_device *adev);
static void uvd_v4_2_init_cg(struct amdgpu_device *adev);
static void uvd_v4_2_set_ring_funcs(struct amdgpu_device *adev);
@@ -438,6 +440,32 @@ static void uvd_v4_2_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
	amdgpu_ring_write(ring, 2);
}

/**
 * uvd_v4_2_ring_emit_hdp_flush - emit an hdp flush
 *
 * @ring: amdgpu_ring pointer
 *
 * Emits an hdp flush.
 */
static void uvd_v4_2_ring_emit_hdp_flush(struct amdgpu_ring *ring)
{
	amdgpu_ring_write(ring, PACKET0(mmHDP_MEM_COHERENCY_FLUSH_CNTL, 0));
	amdgpu_ring_write(ring, 0);
}

/**
 * uvd_v4_2_ring_hdp_invalidate - emit an hdp invalidate
 *
 * @ring: amdgpu_ring pointer
 *
 * Emits an hdp invalidate.
 */
static void uvd_v4_2_ring_emit_hdp_invalidate(struct amdgpu_ring *ring)
{
	amdgpu_ring_write(ring, PACKET0(mmHDP_DEBUG0, 0));
	amdgpu_ring_write(ring, 1);
}

/**
 * uvd_v4_2_ring_test_ring - register write test
 *
@@ -763,6 +791,8 @@ static const struct amdgpu_ring_funcs uvd_v4_2_ring_funcs = {
	.parse_cs = amdgpu_uvd_ring_parse_cs,
	.emit_ib = uvd_v4_2_ring_emit_ib,
	.emit_fence = uvd_v4_2_ring_emit_fence,
	.emit_hdp_flush = uvd_v4_2_ring_emit_hdp_flush,
	.emit_hdp_invalidate = uvd_v4_2_ring_emit_hdp_invalidate,
	.test_ring = uvd_v4_2_ring_test_ring,
	.test_ib = uvd_v4_2_ring_test_ib,
	.insert_nop = amdgpu_ring_insert_nop,
+29 −0
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@
#include "uvd/uvd_5_0_sh_mask.h"
#include "oss/oss_2_0_d.h"
#include "oss/oss_2_0_sh_mask.h"
#include "bif/bif_5_0_d.h"
#include "vi.h"

static void uvd_v5_0_set_ring_funcs(struct amdgpu_device *adev);
@@ -488,6 +489,32 @@ static void uvd_v5_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
	amdgpu_ring_write(ring, 2);
}

/**
 * uvd_v5_0_ring_emit_hdp_flush - emit an hdp flush
 *
 * @ring: amdgpu_ring pointer
 *
 * Emits an hdp flush.
 */
static void uvd_v5_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)
{
	amdgpu_ring_write(ring, PACKET0(mmHDP_MEM_COHERENCY_FLUSH_CNTL, 0));
	amdgpu_ring_write(ring, 0);
}

/**
 * uvd_v5_0_ring_hdp_invalidate - emit an hdp invalidate
 *
 * @ring: amdgpu_ring pointer
 *
 * Emits an hdp invalidate.
 */
static void uvd_v5_0_ring_emit_hdp_invalidate(struct amdgpu_ring *ring)
{
	amdgpu_ring_write(ring, PACKET0(mmHDP_DEBUG0, 0));
	amdgpu_ring_write(ring, 1);
}

/**
 * uvd_v5_0_ring_test_ring - register write test
 *
@@ -815,6 +842,8 @@ static const struct amdgpu_ring_funcs uvd_v5_0_ring_funcs = {
	.parse_cs = amdgpu_uvd_ring_parse_cs,
	.emit_ib = uvd_v5_0_ring_emit_ib,
	.emit_fence = uvd_v5_0_ring_emit_fence,
	.emit_hdp_flush = uvd_v5_0_ring_emit_hdp_flush,
	.emit_hdp_invalidate = uvd_v5_0_ring_emit_hdp_invalidate,
	.test_ring = uvd_v5_0_ring_test_ring,
	.test_ib = uvd_v5_0_ring_test_ib,
	.insert_nop = amdgpu_ring_insert_nop,
+29 −0
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@
#include "oss/oss_2_0_sh_mask.h"
#include "smu/smu_7_1_3_d.h"
#include "smu/smu_7_1_3_sh_mask.h"
#include "bif/bif_5_1_d.h"
#include "vi.h"

static void uvd_v6_0_set_ring_funcs(struct amdgpu_device *adev);
@@ -591,6 +592,32 @@ static void uvd_v6_0_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq
	amdgpu_ring_write(ring, 2);
}

/**
 * uvd_v6_0_ring_emit_hdp_flush - emit an hdp flush
 *
 * @ring: amdgpu_ring pointer
 *
 * Emits an hdp flush.
 */
static void uvd_v6_0_ring_emit_hdp_flush(struct amdgpu_ring *ring)
{
	amdgpu_ring_write(ring, PACKET0(mmHDP_MEM_COHERENCY_FLUSH_CNTL, 0));
	amdgpu_ring_write(ring, 0);
}

/**
 * uvd_v6_0_ring_hdp_invalidate - emit an hdp invalidate
 *
 * @ring: amdgpu_ring pointer
 *
 * Emits an hdp invalidate.
 */
static void uvd_v6_0_ring_emit_hdp_invalidate(struct amdgpu_ring *ring)
{
	amdgpu_ring_write(ring, PACKET0(mmHDP_DEBUG0, 0));
	amdgpu_ring_write(ring, 1);
}

/**
 * uvd_v6_0_ring_test_ring - register write test
 *
@@ -931,6 +958,8 @@ static const struct amdgpu_ring_funcs uvd_v6_0_ring_funcs = {
	.parse_cs = amdgpu_uvd_ring_parse_cs,
	.emit_ib = uvd_v6_0_ring_emit_ib,
	.emit_fence = uvd_v6_0_ring_emit_fence,
	.emit_hdp_flush = uvd_v6_0_ring_emit_hdp_flush,
	.emit_hdp_invalidate = uvd_v6_0_ring_emit_hdp_invalidate,
	.test_ring = uvd_v6_0_ring_test_ring,
	.test_ib = uvd_v6_0_ring_test_ib,
	.insert_nop = amdgpu_ring_insert_nop,