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Commit cbc2d291 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "Coresight: disable cache feature for tmc controller"

parents 7c5cef0c 891df472

drivers/hwtracing/coresight/coresight-tmc-etr.c

+1 −1
Original line number Diff line number Diff line
@@ -448,7 +448,7 @@ void tmc_etr_enable_hw(struct tmc_drvdata *drvdata) 


	axictl = (axictl &

		  ~(TMC_AXICTL_CACHE_CTL_B0 | TMC_AXICTL_CACHE_CTL_B1)) |

		  TMC_AXICTL_CACHE_CTL_B0 | TMC_AXICTL_CACHE_CTL_B1;

		  TMC_AXICTL_CACHE_CTL_B0;

	writel_relaxed(axictl, drvdata->base + TMC_AXICTL);

	tmc_write_dba(drvdata, drvdata->paddr);

	/*