mhi: core: make timesync register access strict
Ensure timesync register access is only attempted if both pm states allow it to prevent unclocked access leading to NOC errors when any of the pm states is a false-positive. CRs-Fixed: 2465813 Change-Id: I46eb2179ce406bef833cbeb7f1728871b54c4eaf Acked-by:Bhaumik Vasav Bhatt <bbhatt@qti.qualcomm.com> Signed-off-by:
Tony Truong <truong@codeaurora.org>
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