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Commit c8ecc877 authored by Subhash Jadavani's avatar Subhash Jadavani
Browse files

scsi: ufs: add UFS HS-G4 support 



New generation (3.0) UFS devices are capable of running at HS-G4
(High Speed Gear 4) which is 2x faster than previous generation
UFS devices. This change adds all required support to make our host
controller work with these faster devices.

Change-Id: I3efc6ce6ab1e90bca78348518a1f50d8d5be971e
Signed-off-by: default avatarBao D. Nguyen <nguyenb@codeaurora.org>
Signed-off-by: default avatarSubhash Jadavani <subhashj@codeaurora.org>
parent e56edded

Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt

+2 −0
Original line number Diff line number Diff line
@@ -76,6 +76,7 @@ Optional properties: 
			  Defaults to 26 MHz if not specified.

- extcon:       phandle to external connector (Refer Documentation/devicetree/bindings/extcon/extcon-gpio.txt for more details).

- non-removable		: defines if the connected ufs device is not removable

- force-g4		: forces UFS Host PHY to be initialized in HS-G4





Note: If above properties are not defined it can be assumed that the supply
@@ -108,6 +109,7 @@ Example: 
		rpm-level = <3>;

		spm-level = <5>;

		dev-ref-clk-freq = <0>; /* reference clock freq: 19.2 MHz */

		force-g4;

	};



==== MSM UFS platform driver properties =====

drivers/phy/qualcomm/phy-qcom-ufs-i.h

+2 −1
Original line number Diff line number Diff line
@@ -159,7 +159,8 @@ struct ufs_qcom_phy { 
 * @dbg_register_dump: pointer to a function that dumps phy registers for debug.

 */

struct ufs_qcom_phy_specific_ops {

	int (*calibrate_phy)(struct ufs_qcom_phy *phy, bool is_rate_B);

	int (*calibrate_phy)(struct ufs_qcom_phy *phy, bool is_rate_B,

			     bool is_g4);

	void (*start_serdes)(struct ufs_qcom_phy *phy);

	int (*is_physical_coding_sublayer_ready)(struct ufs_qcom_phy *phy);

	void (*set_tx_lane_enable)(struct ufs_qcom_phy *phy, u32 val);

drivers/phy/qualcomm/phy-qcom-ufs-qmp-14nm.c

+2 −2
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2013-2015, Linux Foundation. All rights reserved.

 * Copyright (c) 2013-2015, 2018, Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -18,7 +18,7 @@ 


static

int ufs_qcom_phy_qmp_14nm_phy_calibrate(struct ufs_qcom_phy *ufs_qcom_phy,

					bool is_rate_B)

					bool is_rate_B, bool is_g4)

{

	int err;

	int tbl_size_A, tbl_size_B;

drivers/phy/qualcomm/phy-qcom-ufs-qmp-v3-660.c

+1 −1
Original line number Diff line number Diff line
@@ -18,7 +18,7 @@ 


static

int ufs_qcom_phy_qmp_v3_660_phy_calibrate(struct ufs_qcom_phy *ufs_qcom_phy,

					bool is_rate_B)

					bool is_rate_B, bool is_g4)

{

	int err;

	int tbl_size_A, tbl_size_B;

drivers/phy/qualcomm/phy-qcom-ufs-qmp-v3.c

+2 −2
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.

 * Copyright (c) 2013-2016, 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -18,7 +18,7 @@ 


static

int ufs_qcom_phy_qmp_v3_phy_calibrate(struct ufs_qcom_phy *ufs_qcom_phy,

					bool is_rate_B)

					bool is_rate_B, bool is_g4)

{

	/*

	 * Writing PHY calibration in this order: