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Commit e56edded authored by Subhash Jadavani's avatar Subhash Jadavani
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ARM: dts: msm: enable UFS HS-G4 related attributes for sm8150



UFS 3.0 devices support HS-G4 bus speed modes and these devices
need additional voltage supply to be enabled. In addition, this
change adds new bus bandwidth votes for HS-G4.

Change-Id: I12baec5fcad014a5e58dc5ead4fc5d39730e438c
Signed-off-by: default avatarSubhash Jadavani <subhashj@codeaurora.org>
parent 5cfddbc8
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+2 −0
Original line number Diff line number Diff line
@@ -302,8 +302,10 @@
	vdd-hba-fixed-regulator;
	vcc-supply = <&pm8150_l10>;
	vcc-voltage-level = <2950000 2960000>;
	vccq-supply = <&pm8150_l9>;
	vccq2-supply = <&pm8150_s4>;
	vcc-max-microamp = <750000>;
	vccq-max-microamp = <700000>;
	vccq2-max-microamp = <750000>;

	qcom,vddp-ref-clk-supply = <&pm8150_l9>;
+2 −0
Original line number Diff line number Diff line
@@ -277,8 +277,10 @@
	vdd-hba-fixed-regulator;
	vcc-supply = <&pm8150_l10>;
	vcc-voltage-level = <2950000 2960000>;
	vccq-supply = <&pm8150_l9>;
	vccq2-supply = <&pm8150_s4>;
	vcc-max-microamp = <750000>;
	vccq-max-microamp = <700000>;
	vccq2-max-microamp = <750000>;

	qcom,vddp-ref-clk-supply = <&pm8150_l9>;
+2 −0
Original line number Diff line number Diff line
@@ -241,8 +241,10 @@
	vdd-hba-fixed-regulator;
	vcc-supply = <&pm8150_l10>;
	vcc-voltage-level = <2950000 2960000>;
	vccq-supply = <&pm8150_l9>;
	vccq2-supply = <&pm8150_s4>;
	vcc-max-microamp = <750000>;
	vccq-max-microamp = <700000>;
	vccq2-max-microamp = <750000>;

	qcom,vddp-ref-clk-supply = <&pm8150_l9>;
+9 −5
Original line number Diff line number Diff line
@@ -2313,7 +2313,7 @@
			<0 0>;

		qcom,msm-bus,name = "ufshc_mem";
		qcom,msm-bus,num-cases = <22>;
		qcom,msm-bus,num-cases = <26>;
		qcom,msm-bus,num-paths = <2>;
		qcom,msm-bus,vectors-KBps =
		/*
@@ -2338,12 +2338,15 @@
		<123 512 127796 0>, <1 757 1000 0>,  /* HS G1 RA */
		<123 512 255591 0>, <1 757 1000 0>,  /* HS G2 RA */
		<123 512 2097152 0>, <1 757 102400 0>,  /* HS G3 RA */
		<123 512 4194304 0>, <1 757 204800 0>,  /* HS G4 RA */
		<123 512 255591 0>, <1 757 1000 0>,  /* HS G1 RA L2 */
		<123 512 511181 0>, <1 757 1000 0>,  /* HS G2 RA L2 */
		<123 512 4194304 0>, <1 757 204800 0>, /* HS G3 RA L2 */
		<123 512 8388608 0>, <1 757 409600 0>, /* HS G4 RA L2 */
		<123 512 149422 0>, <1 757 1000 0>,  /* HS G1 RB */
		<123 512 298189 0>, <1 757 1000 0>,  /* HS G2 RB */
		<123 512 2097152 0>, <1 757 102400 0>,  /* HS G3 RB */
		<123 512 4194304 0>, <1 757 204800 0>,  /* HS G4 RB */
		<123 512 298189 0>, <1 757 1000 0>,  /* HS G1 RB L2 */
		<123 512 596378 0>, <1 757 1000 0>,  /* HS G2 RB L2 */
		/* As UFS working in HS G3 RB L2 mode, aggregated
@@ -2353,15 +2356,16 @@
		 * bindwidth (IB) needs to be given a proper value too.
		 */
		<123 512 4194304 0>, <1 757 204800 409600>, /* HS G3 RB L2 */
		<123 512 8388608 0>, <1 757 409600 409600>, /* HS G4 RB L2 */
		<123 512 7643136 0>, <1 757 307200 0>; /* Max. bandwidth */

		qcom,bus-vector-names = "MIN",
		"PWM_G1_L1", "PWM_G2_L1", "PWM_G3_L1", "PWM_G4_L1",
		"PWM_G1_L2", "PWM_G2_L2", "PWM_G3_L2", "PWM_G4_L2",
		"HS_RA_G1_L1", "HS_RA_G2_L1", "HS_RA_G3_L1",
		"HS_RA_G1_L2", "HS_RA_G2_L2", "HS_RA_G3_L2",
		"HS_RB_G1_L1", "HS_RB_G2_L1", "HS_RB_G3_L1",
		"HS_RB_G1_L2", "HS_RB_G2_L2", "HS_RB_G3_L2",
		"HS_RA_G1_L1", "HS_RA_G2_L1", "HS_RA_G3_L1", "HS_RA_G4_L1",
		"HS_RA_G1_L2", "HS_RA_G2_L2", "HS_RA_G3_L2", "HS_RA_G4_L2",
		"HS_RB_G1_L1", "HS_RB_G2_L1", "HS_RB_G3_L1", "HS_RB_G4_L1",
		"HS_RB_G1_L2", "HS_RB_G2_L2", "HS_RB_G3_L2", "HS_RB_G4_L2",
		"MAX";

		/* PM QoS */