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Commit c6efa3f2 authored by Mohammed Mirza Mandayappurath Manzoor's avatar Mohammed Mirza Mandayappurath Manzoor Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add GPU coresight properties for SM8150



Add GPU GX and CX coresight devicetree nodes. Define GPU coresight
names, ATIDs, and their funnel connections.
Include QDSS_GFX_DBG memory mapping in kgsl-3d0 node to access
those registers through coresight interface.

Change-Id: If3231029961788926793f9596f9dcda592825661
Signed-off-by: default avatarMohammed Mirza Mandayappurath Manzoor <mmandaya@codeaurora.org>
parent ff7669a1
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+52 −5
Original line number Diff line number Diff line
@@ -635,7 +635,6 @@
		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_in2_out_funnel_merg: endpoint {
@@ -643,18 +642,24 @@
					  <&funnel_merg_in_funnel_in2>;
				};
			};

			port@1 {
				reg = <2>;
				reg = <1>;
				funnel_in2_in_funnel_apss_merg: endpoint {
					slave-mode;
					remote-endpoint =
					  <&funnel_apss_merg_out_funnel_in2>;
				};

			};
			port@2 {
				reg = <4>;
				reg = <2>;
				funnel_in2_in_funnel_gfx: endpoint {
					slave-mode;
					remote-endpoint =
					  <&funnel_gfx_out_funnel_in2>;
				};
			};
			port@3 {
				reg = <3>;
				funnel_in2_in_tpda_modem: endpoint {
					slave-mode;
					remote-endpoint =
@@ -664,6 +669,48 @@
		};
	};

	funnel_gfx: funnel@0x6943000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b908>;

		reg = <0x6943000 0x1000>;
		reg-names = "funnel-base";

		coresight-name = "coresight-funnel-gfx";

		clocks = <&clock_aop QDSS_CLK>;
		clock-names = "apb_pclk";

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				funnel_gfx_out_funnel_in2: endpoint {
					remote-endpoint =
					  <&funnel_in2_in_funnel_gfx>;
				};
			};
			port@1 {
				reg = <1>;
				funnel_gfx_in_gfx: endpoint {
					slave-mode;
					remote-endpoint =
					  <&gfx_out_funnel_gfx>;
				};
			};
			port@2 {
				reg = <2>;
				funnel_gfx_in_gfx_cx: endpoint {
					slave-mode;
					remote-endpoint =
					  <&gfx_cx_out_funnel_gfx>;
				};
			};
		};
	};

	tpda: tpda@6004000 {
		compatible = "arm,primecell";
		arm,primecell-periphid = <0x0003b969>;
+33 −2
Original line number Diff line number Diff line
@@ -67,8 +67,9 @@
		label = "kgsl-3d0";
		compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d";
		status = "ok";
		reg = <0x2c00000 0x40000>, <0x2c61000 0x800>;
		reg-names = "kgsl_3d0_reg_memory", "cx_dbgc";
		reg = <0x2c00000 0x40000>, <0x2c61000 0x800>,
				<0x6900000 0x44000>;
		reg-names = "kgsl_3d0_reg_memory", "cx_dbgc", "qdss_gfx";
		interrupts = <0 300 0>;
		interrupt-names = "kgsl_3d0_irq";
		qcom,id = <0>;
@@ -147,6 +148,36 @@
		cache-slice-names = "gpu", "gpuhtw";
		cache-slices = <&llcc 12>, <&llcc 11>;


		qcom,gpu-coresights {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "qcom,gpu-coresight";

			qcom,gpu-coresight@0 {
				reg = <0>;
				coresight-name = "coresight-gfx";
				coresight-atid = <50>;
				port {
					gfx_out_funnel_gfx: endpoint {
						remote-endpoint =
						  <&funnel_gfx_in_gfx>;
					};
				};
			};
			qcom,gpu-coresight@1 {
				reg = <1>;
				coresight-name = "coresight-gfx-cx";
				coresight-atid = <51>;
				port {
					gfx_cx_out_funnel_gfx: endpoint {
						remote-endpoint =
						  <&funnel_gfx_in_gfx_cx>;
					};
				};
			};
		};

		qcom,l3-pwrlevels {
			#address-cells = <1>;
			#size-cells = <0>;