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Commit c59f2d22 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: msm: Add support for L2 Cache dumping"

parents ace5e5c9 272f3dab

arch/arm64/boot/dts/qcom/sm8150.dtsi

+96 −0
Original line number Diff line number Diff line
@@ -210,6 +210,7 @@ 
			      cache-size = <0x40000>;

			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			      qcom,dump-size = <0x88000>;

			};



			L1_I_400: l1-icache {
@@ -222,6 +223,14 @@ 
				qcom,dump-size = <0x12000>;

			};



			L1_ITLB_400: l1-itlb {

				qcom,dump-size = <0x300>;

			};



			L1_DTLB_400: l1-dtlb {

				qcom,dump-size = <0x480>;

			};



			L2_TLB_400: l2-tlb {

				qcom,dump-size = <0x7800>;

			};
@@ -243,6 +252,7 @@ 
			      cache-size = <0x40000>;

			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			      qcom,dump-size = <0x88000>;

			};



			L1_I_500: l1-icache {
@@ -255,6 +265,14 @@ 
				qcom,dump-size = <0x12000>;

			};



			L1_ITLB_500: l1-itlb {

				qcom,dump-size = <0x300>;

			};



			L1_DTLB_500: l1-dtlb {

				qcom,dump-size = <0x480>;

			};



			L2_TLB_500: l2-tlb {

				qcom,dump-size = <0x7800>;

			};
@@ -276,6 +294,7 @@ 
			      cache-size = <0x40000>;

			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			      qcom,dump-size = <0x88000>;

			};



			L1_I_600: l1-icache {
@@ -288,6 +307,14 @@ 
				qcom,dump-size = <0x12000>;

			};



			L1_ITLB_600: l1-itlb {

				qcom,dump-size = <0x300>;

			};



			L1_DTLB_600: l1-dtlb {

				qcom,dump-size = <0x480>;

			};



			L2_TLB_600: l2-tlb {

				qcom,dump-size = <0x7800>;

			};
@@ -309,6 +336,7 @@ 
			      cache-size = <0x80000>;

			      cache-level = <2>;

			      next-level-cache = <&L3_0>;

			      qcom,dump-size = <0x110000>;

			};



			L1_I_700: l1-icache {
@@ -321,6 +349,14 @@ 
				qcom,dump-size = <0x12000>;

			};



			L1_ITLB_700: l1-itlb {

				qcom,dump-size = <0x300>;

			};



			L1_DTLB_700: l1-dtlb {

				qcom,dump-size = <0x480>;

			};



			L2_TLB_700: l2-tlb {

				qcom,dump-size = <0x7800>;

			};
@@ -1880,6 +1916,66 @@ 
			qcom,dump-id = <0x87>;

		};



		qcom,l1_i_tlb_dump400 {

			qcom,dump-node = <&L1_ITLB_400>;

			qcom,dump-id = <0x24>;

		};



		qcom,l1_i_tlb_dump500 {

			qcom,dump-node = <&L1_ITLB_500>;

			qcom,dump-id = <0x25>;

		};



		qcom,l1_i_tlb_dump600 {

			qcom,dump-node = <&L1_ITLB_600>;

			qcom,dump-id = <0x26>;

		};



		qcom,l1_i_tlb_dump700 {

			qcom,dump-node = <&L1_ITLB_700>;

			qcom,dump-id = <0x27>;

		};



		qcom,l1_d_tlb_dump400 {

			qcom,dump-node = <&L1_DTLB_400>;

			qcom,dump-id = <0x44>;

		};



		qcom,l1_d_tlb_dump500 {

			qcom,dump-node = <&L1_DTLB_500>;

			qcom,dump-id = <0x45>;

		};



		qcom,l1_d_tlb_dump600 {

			qcom,dump-node = <&L1_DTLB_600>;

			qcom,dump-id = <0x46>;

		};



		qcom,l1_d_tlb_dump700 {

			qcom,dump-node = <&L1_DTLB_700>;

			qcom,dump-id = <0x47>;

		};



		qcom,l2_cache_dump400 {

			qcom,dump-node = <&L2_4>;

			qcom,dump-id = <0xc4>;

		};



		qcom,l2_cache_dump500 {

			qcom,dump-node = <&L2_5>;

			qcom,dump-id = <0xc5>;

		};



		qcom,l2_cache_dump600 {

			qcom,dump-node = <&L2_6>;

			qcom,dump-id = <0xc6>;

		};



		qcom,l2_cache_dump700 {

			qcom,dump-node = <&L2_7>;

			qcom,dump-id = <0xc7>;

		};



		qcom,l2_tlb_dump0 {

			qcom,dump-node = <&L2_TLB_0>;

			qcom,dump-id = <0x120>;