ARM: dts: msm: Add video node for sdm855

/* Copyright (c) 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/msm/msm-bus-ids.h>

#include <dt-bindings/clock/qcom,videocc-sdm855.h>

&soc {

	msm_vidc: qcom,vidc@aa00000 {

		compatible = "qcom,msm-vidc", "qcom,sdm855-vidc";

		status = "disabled";

		reg = <0xaa00000 0x200000>;

		interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;

		/* Supply */

		iris-ctl-supply = <&mvsc_gdsc>;

		vcodec-supply = <&mvs0_gdsc>;

		cvp-supply = <&mvs1_gdsc>;

		/* Clocks */

		clock-names = "core_clk", "iface_clk",

			"vcodec_clk", "cvp_clk", "gcc_video_axi0",

			"gcc_video_axi1", "gcc_video_axic";

		clocks = <&clock_videocc VIDEO_CC_MVSC_CORE_CLK>,

			<&clock_videocc VIDEO_CC_IRIS_AHB_CLK>,

			<&clock_videocc VIDEO_CC_MVS0_CORE_CLK>,

			<&clock_videocc VIDEO_CC_MVS1_CORE_CLK>,

			<&clock_gcc GCC_VIDEO_AXI0_CLK>,

			<&clock_gcc GCC_VIDEO_AXI1_CLK>,

			<&clock_gcc GCC_VIDEO_AXIC_CLK>;

		qcom,proxy-clock-names = "core_clk", "iface_clk",

			"vcodec_clk", "cvp_clk", "gcc_video_axi0",

			"gcc_video_axi1", "gcc_video_axic";

		qcom,clock-configs = <0x1 0x0 0x1 0x1 0x0 0x0 0x0>;

		qcom,allowed-clock-rates = <200000000 225000000

			300000000 365000000 432000000 480000000>;

		/* Buses */

		bus_cnoc {

			compatible = "qcom,msm-vidc,bus";

			label = "cnoc";

			qcom,bus-master = <MSM_BUS_MASTER_AMPSS_M0>;

			qcom,bus-slave = <MSM_BUS_SLAVE_VENUS_CFG>;

			qcom,bus-governor = "performance";

			qcom,bus-range-kbps = <1000 1000>;

		};

		venus_bus_ddr {

			compatible = "qcom,msm-vidc,bus";

			label = "venus-ddr";

			qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>;

			qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>;

			qcom,bus-governor = "performance";

			qcom,bus-range-kbps = <1000 100000000>;

		};

		arm9_bus_ddr {

			compatible = "qcom,msm-vidc,bus";

			label = "venus-arm9-ddr";

			qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>;

			qcom,bus-slave = <MSM_BUS_SLAVE_EBI_CH0>;

			qcom,bus-governor = "performance";

			qcom,bus-range-kbps = <1000 1000>;

		};

		venus_bus_llcc {

			compatible = "qcom,msm-vidc,bus";

			label = "venus-llcc";

			qcom,bus-master = <MSM_BUS_MASTER_VIDEO_P0>;

			qcom,bus-slave = <MSM_BUS_SLAVE_LLCC>;

			qcom,bus-governor = "performance";

			qcom,bus-range-kbps = <1000 100000000>;

		};

		/* MMUs */

		non_secure_cb {

			compatible = "qcom,msm-vidc,context-bank";

			label = "venus_ns";

			iommus =

				<&apps_smmu 0x1300 0x20>,

				<&apps_smmu 0x1340 0x0>;

			buffer-types = <0xfff>;

			virtual-addr-pool = <0x70800000 0x6f800000>;

		};

		secure_bitstream_cb {

			compatible = "qcom,msm-vidc,context-bank";

			label = "venus_sec_bitstream";

			iommus =

				<&apps_smmu 0x1301 0x4>;

			buffer-types = <0x241>;

			virtual-addr-pool = <0x4b000000 0x25800000>;

			qcom,secure-context-bank;

		};

		secure_pixel_cb {

			compatible = "qcom,msm-vidc,context-bank";

			label = "venus_sec_pixel";

			iommus =

				<&apps_smmu 0x1303 0x20>;

			buffer-types = <0x106>;

			virtual-addr-pool = <0x25800000 0x25800000>;

			qcom,secure-context-bank;

		};

		secure_non_pixel_cb {

			compatible = "qcom,msm-vidc,context-bank";

			label = "venus_sec_non_pixel";

			iommus =

				<&apps_smmu 0x1304 0x20>,

				<&apps_smmu 0x1344 0x0>;

			buffer-types = <0x480>;

			virtual-addr-pool = <0x1000000 0x24800000>;

			qcom,secure-context-bank;

		};

	};

};

#include "sdm855-npu.dtsi"

#include "sdm855-pm.dtsi"

#include "sdm855-audio.dtsi"

#include "sdm855-vidc.dtsi"