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Commit ae67e3e5 authored by Sagar Dharia's avatar Sagar Dharia Committed by Karthikeyan Ramasubramanian
Browse files

ARM: dts: msm: Add UART related entries for SDM855 



Add pincontrol, and device settings to support console & high-speed
UART on SDM855 platform.

CRs-Fixed: 2124301
Change-Id: Idd532cb7c7b32bfff3a99ce816940d498ee2862b
Signed-off-by: default avatarSagar Dharia <sdharia@codeaurora.org>
Signed-off-by: default avatarKarthikeyan Ramasubramanian <kramasub@codeaurora.org>
parent 2b5642e1

arch/arm64/boot/dts/qcom/sdm855-cdp.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -9,3 +9,7 @@ 
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&qupv3_se12_2uart {

	status = "ok";

};

arch/arm64/boot/dts/qcom/sdm855-mtp.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -9,3 +9,7 @@ 
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&qupv3_se12_2uart {

	status = "ok";

};

arch/arm64/boot/dts/qcom/sdm855-pinctrl.dtsi

+60 −0
Original line number Diff line number Diff line
@@ -65,5 +65,65 @@ 
				output-high; /* active low reset */

			};

		};



		qupv3_se12_2uart_pins: qupv3_se12_2uart_pins {

			qupv3_se12_2uart_active: qupv3_se12_2uart_active {

				mux {

					pins = "gpio85", "gpio86";

					function = "qup10";

				};



				config {

					pins = "gpio85", "gpio86";

					drive-strength = <2>;

					bias-disable;

				};

			};



			qupv3_se12_2uart_sleep: qupv3_se12_2uart_sleep {

				mux {

					pins = "gpio85", "gpio86";

					function = "gpio";

				};



				config {

					pins = "gpio85", "gpio86";

					drive-strength = <2>;

					bias-disable;

				};

			};

		};



		qupv3_se17_4uart_pins: qupv3_se17_4uart_pins {

			qupv3_se17_4uart_active: qupv3_se17_4uart_active {

				mux {

					pins = "gpio43", "gpio44", "gpio45",

								"gpio46";

					function = "qup13";

				};



				config {

					pins = "gpio43", "gpio44", "gpio45",

								"gpio46";

					drive-strength = <2>;

					bias-disable;

				};

			};



			qupv3_se17_4uart_sleep: qupv3_se17_4uart_sleep {

				mux {

					pins = "gpio43", "gpio44", "gpio45",

								"gpio46";

					function = "gpio";

				};



				config {

					pins = "gpio43", "gpio44", "gpio45",

								"gpio46";

					drive-strength = <2>;

					bias-disable;

				};

			};

		};

	};

};

arch/arm64/boot/dts/qcom/sdm855-qupv3.dtsi

+38 −0
Original line number Diff line number Diff line
@@ -41,6 +41,25 @@ 
		};

	};



	/* 2-wire UART */



	/* Debug UART Instance for CDP/MTP platform */

	qupv3_se12_2uart: qcom,qup_uart@0xa90000 {

		compatible = "qcom,msm-geni-console", "qcom,msm-geni-uart";

		reg = <0xa90000 0x4000>;

		reg-names = "se_phys";

		clock-names = "se-clk", "m-ahb", "s-ahb";

		clocks = <&clock_gcc GCC_QUPV3_WRAP1_S4_CLK>,

			<&clock_gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>,

			<&clock_gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;

		pinctrl-names = "default", "sleep";

		pinctrl-0 = <&qupv3_se12_2uart_active>;

		pinctrl-1 = <&qupv3_se12_2uart_sleep>;

		interrupts = <GIC_SPI 357 0>;

		qcom,wrapper-core = <&qupv3_1>;

		status = "disabled";

	};



	/* QUPv3 East Instances */

	qupv3_2: qcom,qupv3_2_geni_se@cc0000 {

		compatible = "qcom,qupv3-geni-se";
@@ -54,4 +73,23 @@ 
			iommus = <&apps_smmu 0x7a3 0x0>;

		};

	};



	/* 4-wire UART */

	qupv3_se17_4uart: qcom,qup_uart@0xc8c000 {

		compatible = "qcom,msm-geni-serial-hs", "qcom,msm-geni-uart";

		reg = <0xc8c000 0x4000>;

		reg-names = "se_phys";

		clock-names = "se-clk", "m-ahb", "s-ahb";

		clocks = <&clock_gcc GCC_QUPV3_WRAP2_S3_CLK>,

			<&clock_gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>,

			<&clock_gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>;

		pinctrl-names = "default", "sleep";

		pinctrl-0 = <&qupv3_se17_4uart_active>;

		pinctrl-1 = <&qupv3_se17_4uart_sleep>;

		interrupts-extended = <GIC_SPI 585 0>,

				<&tlmm 46 0>;

		qcom,wrapper-core = <&qupv3_2>;

		qcom,wakeup-byte = <0xFD>;

		status = "disabled";

	};

};

arch/arm64/boot/dts/qcom/sdm855-rumi.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -57,6 +57,10 @@ 
	};

};



&qupv3_se12_2uart {

	status = "ok";

};



&usb0 {

	dwc3@a600000 {

		usb-phy = <&usb_emu_phy>;